74AC139PC

74AC139 74ACT139 Dual 1-of-4 Decoder/Demultiplexer November 1988 Revised November 1999 74AC139 74ACT139 Dual 1-of-4 Decoder/Demultiplexer General Description Features The AC/ACT139 is a high-speed, dual 1-of-4 decoder/ I reduced by 50% CC demultiplexer. The device has two independent decoders, Multifunction capability each accepting two inputs and providing four mutually- Two completely independent 1-of-4 decoders exclusive active-LOW outputs. Each decoder has an Active LOW mutually exclusive outputs active-LOW Enable input which can be used as a data input for a 4-output demultiplexer. Each half of the AC/ Outputs source/sink 24 mA ACT139 can be used as a function generator providing all ACT139 has TTL-compatible inputs four minterms of two variables. Ordering Code: Order Number Package Number Package Description 74AC139SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Body 74AC139SJ M16D 16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide 74AC139MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC139PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74ACT139SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Body 74ACT139SJ M16D 16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide 74ACT139MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT139PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering code. Connection Diagram Pin Descriptions Pin Names Description A , A Address Inputs 0 1 E Enable Inputs O O Outputs 0 3 FACT is a trademark of Fairchild Semiconductor Corporation. 1999 Fairchild Semiconductor Corporation DS009926 www.fairchildsemi.comLogic Symbols Functional Description The AC/ACT139 is a high-speed dual 1-of-4 decoder/ demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A A ) 0 1 and provides four mutually exclusive active-LOW outputs (O O ). Each decoder has an active-LOW enable (E). 0 3 When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4-output demultiplexer application. Each half of the AC/ACT139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 1, and thereby reducing the number of packages required in a logic network. IEEE/IEC FIGURE 1. Gate Functions (Each Half) Truth Table Logic Diagram Inputs Outputs A A O O O O E 0 1 0 1 2 3 H X X HHHH L LLL H H H L H LH LH H L L HHH L H L HHHHH L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74AC139 74ACT139