74LVX174M ON Semiconductor

74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset May 1993 Revised October 2003 74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset General Description Features The LVX174 is a high-speed hex D flip-flop. The device is Input voltage level translation from 5V to 3V used primarily as a 6-bit edge-triggered storage register. Ideal for low power/low noise 3.3V applications The information on the D inputs is transferred to storage Guaranteed simultaneous switching noise level and during the LOW-to-HIGH clock transition. The device has a dynamic threshold performance Master Reset to simultaneously clear all flip-flops. Ordering Code: Order Number Package Number Package Description 74LVX174M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LVX174SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX174MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description D D Data Inputs 0 5 CP Clock Pulse Input MR Master Reset Input Q Q Outputs 0 5 2003 Fairchild Semiconductor Corporation DS011607 www.fairchildsemi.comTruth Table Inputs Outputs Operating Mode D Q MR CP n n Reset (Clear) L X X L Load 1 H HH Load 0 H LL H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition Logic Diagram www.fairchildsemi.com 2 74LVX174