CAT28C17A 16 kb CMOS Parallel EEPROM Description The CAT28C17A is a fast, low power, 5 Vonly CMOS Parallel EEPROM organized as 2K x 8bits. It requires a simple interface for CAT28C17A PIN CONFIGURATION DIP Package (P, L) PLCC Package (N, G) SOIC Package (J, K, W, X) RDY/BUSY 28 V 1 CC NC 27 WE 2 26 NC A 3 7 25 A A 4 8 4 3 2 1 32 31 30 6 A 5 29 A 24 A 6 8 A 5 9 5 6 28 A A 5 9 6 23 NC A 4 7 27 A NC 4 7 A 22 OE 3 A 8 26 NC 3 8 21 A A 10 2 A 9 25 OE 2 TOP VIEW 20 A 9 CE 1 A 10 24 A 1 10 19 A 10 I/O 11 23 A CE 0 7 0 11 NC 12 22 I/O I/O 18 I/O 0 7 6 I/O 13 21 I/O 12 I/O I/O 0 6 17 1 5 14 15 16 17 18 19 20 I/O 13 16 I/O 2 4 14 15 V I/O SS 3 2,048 x 8 ROW ADDR. BUFFER A A DECODER EEPROM 4 10 & LATCHES ARRAY INADVERTENT HIGH VOLTAGE WRITE GENERATOR V CC PROTECTION CE CONTROL OE LOGIC WE I/O BUFFERS DATA POLLING TIMER & RDY/BUSY I/O I/O 0 7 ADDR. BUFFER A A 0 3 COLUMN & LATCHES DECODER RDY/BUSY Figure 1. Block Diagram