Product Information

DM74ALS74AN

DM74ALS74AN electronic component of ON Semiconductor

Datasheet
Flip Flops Dual D Flip-Flop

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1002: USD 0.4198 ea
Line Total: USD 420.64

0 - Global Stock
MOQ: 1002  Multiples: 1002
Pack Size: 1002
Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 15 May to Tue. 21 May

MOQ : 1
Multiples : 1

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DM74ALS74AN
ON Semiconductor

1 : USD 1.2753
10 : USD 1.2402
100 : USD 1.0179
250 : USD 0.8482
1000 : USD 0.6961
1500 : USD 0.6903

0 - WHS 2


Ships to you between Wed. 15 May to Tue. 21 May

MOQ : 1002
Multiples : 1002

Stock Image

DM74ALS74AN
ON Semiconductor

1002 : USD 0.4198

     
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RoHS - XON
Icon ROHS
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DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear September 1986 Revised February 2000 DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The DM74ALS74A contains two independent positive Switching specifications at 50 pF edge-triggered flip-flops. Each flip-flop has individual D, Switching specifications guaranteed over full tempera- clock, clear and preset inputs, and also complementary Q ture and V range CC and Q outputs. Advanced oxide-isolated, ion-implanted Schottky TTL Information at input D is transferred to the Q output on the process positive going edge of the clock pulse. Clock triggering Functionally and pin-for-pin compatible with Schottky occurs at a voltage level of the clock pulse and is not and LS TTL counterpart directly related to the transition time of the positive going Improved AC performance over LS74 at approximately pulse. When the clock input is at either the HIGH or LOW half the power level, the D input signal has no effect. Asynchronous preset and clear inputs will set or clear Q output respectively upon the application of low level signal. Ordering Code: Order Number Package Number Package Description DM74ALS74AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74ALS74ASJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS74AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagram Function Table Inputs Outputs PR CLR CLK D Q Q LH X X H L HL X X L H L L X X H (Note 1) H (Note 1) HH HH L HH LL H HH L X Q Q 0 0 L = LOW State H = HIGH State X = Don t Care = Positive Edge Transition Q = Previous Condition of Q 0 Note 1: This condition is nonstable it will not persist when preset and clear inputs return to their inactive (HIGH) level. The output levels in this condi- tion are not guaranteed to meet the V specification. OH 2000 Fairchild Semiconductor Corporation DS006109 www.fairchildsemi.comLogic Diagram www.fairchildsemi.com 2 DM74ALS74A

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
Fairchild Semiconductor
FS8
FSC
ON
ON SEMI
ON Semicon
ON SEMICONDUCTOR
ON SEMICONDUCTOR (FAIRCHILD)
ON Semiconductor / Fairchild
ON4
ON5
onsemi
ON-SEMI
onsemi / Fairchild
OOF
Xsens / Fairchild

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