Ordering number : EN5974B LB1980H Monolithic Digital IC For VCR Capstan Motors LB1980H Allowable Operating Ranges at Ta = 25C Parameter Symbol Conditions Ratings Unit Supply voltage V 5 to 22 V S V 4.5 to 5.5 V CC Hall input amplitude V Between the hall inputs 30 to 80 mVo-p HALL GSENSE pin input range V With respect to the control system ground -0.20 to +0.20 V GSENSE Electrical Characteristics at Ta = 25C, V = 5V,V = 15V CC S Ratings Parameter Symbol Conditions Unit min typ max V supply current I R =, V =0V, V =0V (Quiescent) 12 18 mA CC CC L CTL LIM Outputs Output saturation voltage VO sat1 I =500mA, Rf=0.5, Sink+Source 2.1 2.6 V O V =V =5V(With saturation prevention) CTL LIM VO sat2 I =1.0mA, Rf=0.5, Sink+Source 2.6 3.5 V O V =V =5V(With saturation prevention) CTL LIM Output leakage current I leak 1.0 mA O FR FR pin input threshold voltage V 2.25 2.50 2.75 V FSR FR pin input bias current I(FSR) -5.0 mA B Control CTLREF pin voltage V 2.05 2.15 2.25 V CREF CTLREF pin input range V 1.50 3.50 V CREFIN CTL pin input bias current I(CTL) With V =5V and the CTLREF pin open 4.0 A B CTL CTL pin control start voltage V (ST) With Rf=0.5, V =5V, I 10mA, 2.00 2.15 2.30 V CTL LIM O Hall input logic fixed (U, V, W=H, H, L) CTL pin control Gm Gm(CTL) With Rf=0.5, I =200mA, 0.46 0.58 0.70 A / V O Hall input logic fixed (U, V, W=H, H, L) Current Limiter LIM current limit offset voltage Voff(LIM) With Rf=0.5, V =5V, I 10mA, 140 200 260 mV CTL O Hall input logic fixed (U, V, W=H, H, L) LIM pin input bias current I(LIM) With V =5V and the V pin open -2.5 A B CTL CREF LIM pin current control level I With Rf=0.5, V =5V, V =2.06V 830 900 970 mA LIM CTL LIM Hall input logic fixed (U, V, W=H, H, L) Hall Amplifier Hall amplifier input offset voltage Voff(HALL) -6 +6 mA Hall amplifier input bias current I(HALL) 1.0 3.0 A B Hall amplifier common-mode V (HALL) 1.3 3.3 V CM input voltage range TRC Torque ripple correction ratio TRC For the high and low peaks in the 9 % Rf waveform when I =200mA. O (Rf=0.5, with the ADJ pin open) *1 ADJ pin voltage V 2.37 2.50 2.63 V ADJ FG Amplifier FG amplifier input offset voltage Voff(FG) -8 +8 mV FG amplifier input bias current I(FG) -100 nA B FG amplifier output saturation V sat (FG) Sink side, for the load provided by the internal 0.5 V O pull-up resistor voltage FG amplifier voltage gain V (FG) For the open loop state with f=10kHz 41.5 44.5 47.5 dB G FG amplifier common-mode V (FG) 0.5 4.0 V GM input voltage Saturation Saturation prevention circuit VO sat(DET) The voltages between each OUT and 0.175 0.25 0.325 V Rf pair when I =10mA, Rf=0.5, and lower side voltage setting O V =V =5V CTL LIM TSD TSD operating temperature TSD Design target value *2 180 C Hysteresis width TSD Design target value *2 20 C Notes : *1. The torque ripple correction ratio is determined as follows from the Rf voltage waveform. *2. Parameters that are indicated as design target values in the conditions column are not tested. No.5974-2/7