LC75832E, LC75832W Static Drive, 1/2-Duty Drive General-Purpose LCD Driver Overview The LC75832E and 75832W are static drive or 1/2-duty drive, www.onsemi.com microcontroller-controlled general-purpose LCD drivers that can be used in applications such as frequency display in products with electronic tuning. In addition to being capable to drive up to 108 segments directly, they can control up to 4 general-purpose output ports. Since the LC75832E and LC75832W use separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage. PQFP64 14x14 / QIP64E Features LC75832E Serial data control of switching between static drive mode and 1/2 duty drive mode. Up to 54 segments can be displayed in static drive (1/1 duty) mode and up to 108 segments can be displayed in 1/2 duty drive mode. Serial data input supports CCB* format communication with the system controller. Serial data control of the power-saving mode based backup function and the all segments forced off function. SPQFP64 10x10 / SQFP64 Serial data control of switching between the segment output port and LC75832W general-purpose output port functions (up to 4 general-purpose output ports). Serial data control of the frame frequency of the common and segment output waveforms. Either RC oscillator operating or external clock operating mode can be selected with the serial control data. High generality, since display data is displayed directly without the intervention of a decoder circuit. Independent V for the LCD driver block LCD (V can be set to any voltage in the range of 2.7 to 6.0 volts.) LCD regardless of the logic block supply-voltage. The INH pin allows the display to be forced to the off state. Allows compatible operation with the LC75822 (822 mode transfer function). * Computer Control Bus (CCB) is an ON Semiconductors original bus format and the bus addresses are controlled by ON Semiconductor. ORDERING INFORMATION See detailed ordering and shipping information on page 24 of this data sheet. Semiconductor Components Industries, LLC, 2017 1 Publication Order Number : June 2017 - Rev. 1 LC75832E W/D LC75832E, LC75832W Specifications Absolute Maximum Ratings at Ta = 25 C, V = 0 V SS Parameter Symbol Conditions Ratings Unit Maximum supply voltage V max V 0.3 to +7.0 DD DD V V max V 0.3 to +7.0 LCD LCD Input voltage V 1 CE, CL, DI, INH 0.3 to +7.0 IN V V2 OSC 0.3 to V +0.3 IN DD Output voltage V 1 OSC 0.3 to V +0.3 OUT DD V V 2 S1 to S54, COM1, COM2, P1 to P4 0.3 to V +0.3 OUT LCD Output current I 1 S1 to S54 300 A OUT I2 COM1, COM2 3 OUT mA I 3 P1 to P4 5 OUT Allowable power dissipation Pd max Ta = 105 C 100 mW Operating temperature Topr 40 to +105 C Storage temperature Tstg 55 to +125 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Allowable Operating Ranges at Ta = 40 to +105C, V = 0 V SS Ratings Parameter Symbol Conditions unit min typ max Supply voltage V V 2.7 6.0 DD DD V V V 2.7 6.0 LCD LCD Input high-level voltage V 1 CE, CL, DI, INH 0.8V 6.0 IH DD V V 2 OSC external clock operating mode 0.7V V IH DD DD Input low-level voltage V 1 CE, CL, DI, INH 0 0.2V IL DD V V 2 OSC external clock operating mode 0 0.3V IL DD Recommended external Rosc OSC RC oscillator operating mode 39 k resistor for RC oscillation Recommended external Cosc OSC RC oscillator operating mode 1000 pF capacitor for RC oscillation Guaranteed range of RC fosc OSC RC oscillator operating mode 19 38 76 kHz oscillation External clock operating f OSC external clock operating mode CK 19 38 76 kHz frequency Figure 3 External clock duty cycle D OSC external clock operating mode CK 30 50 70 % Figure 3 Data setup time tds CL, DI Figure 1 Figure 2 160 ns Data hold time tdh CL, DI Figure 1 Figure 2 160 ns CE wait time tcp CE, CL Figure 1 Figure 2 160 ns CE setup time tcs CE, CL Figure 1 Figure 2 160 ns CE hold time tch CE, CL Figure 1 Figure 2 160 ns High-level clock pulse width t H CL Figure 1 Figure 2 160 ns Low-level clock pulse width t L CL Figure 1 Figure 2 160 ns Rise time tr CE, CL, DI Figure 1 Figure 2 160 ns Fall time tf CE, CL, DI Figure 1 Figure 2 160 ns switching time tc , CE Figure 4 to Figure 7 INH INH 10 s Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2