MC100EL29
5 V ECL Dual Differential
Data and Clock D FlipFlop
With Set and Reset
Description
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The MC100EL29 is a dual master-slave flip flop. The device
features fully differential Data and Clock inputs as well as outputs.
Data enters the master latch when the clock is LOW and transfers to
the slave upon a positive transition on the clock input.
The V pin, an internally generated voltage supply, is available to
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this device only. For single-ended input conditions, the unused
SOIC20 WB
differential input is connected to V as a switching reference voltage.
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WB SUFFIX
V may also rebias AC coupled inputs. When used, decouple V
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CASE 751D05
and V via a 0.01 F capacitor and limit current sourcing or sinking
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to 0.5 mA. When not used, V should be left open.
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The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
MARKING DIAGRAM*
are left open the D input will pull down to V and the D input will
EE
bias around V /2. The outputs will go to a defined state, however the
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state will be random based on how the flip flop powers up.
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Both flip flops feature asynchronous, overriding Set and Reset
inputs. Note that the Set and Reset inputs cannot both be HIGH
100EL29
simultaneously.
AWLYYWWG
The 100 Series Contains Temperature Compensation.
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Features
1100 MHz Flip-Flop Toggle Frequency
A = Assembly Location
580 ps Propagation Delays WL = Wafer Lot
YY = Year
Q Output will Default LOW with Inputs Open or at V
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WW = Work Week
PECL Mode Operating Range: V = 4.2 V to 5.7 V
CC G = Pb-Free Package
with V = 0 V
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*For additional marking information, refer to
NECL Mode Operating Range: V = 0 V
CC
Application Note AND8002/D.
with V = 4.2 V to 5.7 V
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Internal Input Pulldown Resistors on D(s), CLK(s), S(s), and R(s).
ESD Protection:
ORDERING INFORMATION
> 2 kV Human Body Model
> 100 V Machine Model
Device Package Shipping
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
MC100EL29DWG SOIC20 WB 38 Units/Tube
Moisture Sensitivity: Level 3 (Pb-Free)
(Pb-Free)
(For Additional Information, see Application Note AND8003/D)
MC100EL29DWR2G 1000/Tape & Reel
SOIC20 WB
Flammability Rating: UL 94 V0 @ 1.125 in, (Pb-Free)
Oxygen Index: 28 to 34 For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
Transistor Count = 313 Devices
to our Tape and Reel Packaging Specifications
This Device is Pb-Free, Halogen Free and is RoHS Compliant Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2016
1 Publication Order Number:
July, 2016 Rev. 5 MC100EL29/DMC100EL29
R0 V Q0 Q0 S0 S1 V Q1 Q1 V
CC CC EE
20 19 18 17 16 15 14 13 12 11
Q Q Q Q
R S S R
D CLK D CLK
1 2 3 4 5678 9 10
D0 D0 CLK0 CLK0 V D1 D1 CLK1 CLK1 R1
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* All V pins are tied together on the die.
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Warning: All V and V pins must be externally connected
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to Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
Table 1. PIN DESCRIPTION Table 2. TRUTH TABLE
PIN FUNCTION R* S* D* CLK* Q Q
D0, D0; D1, D1 ECL Differential Data Inputs L L L Z L H
R0R1 ECL Reset Inputs L L H Z H L
CLK0, CLK0; CLK1, CLK1 ECL Differential Clock Inputs H L X X L H
S0S1 ECL Set Inputs L H X X H L
Q0, Q0; Q1, Q1 ECL Differential Data Outputs H H X X Undef Undef
V Reference Voltage Output
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Z = LOW to HIGH Transition
V Positive Supply
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* Pins will default LOW when left open.
V Negative Supply
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Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V PECL Mode Power Supply V = 0 V 8 V
CC EE
V NECL Mode Power Supply V = 0 V 8 V
EE CC
V PECL Mode Input Voltage V = 0 V V V 6 V
I EE I CC
NECL Mode Input Voltage V = 0 V V V 6 V
CC I EE
I Output Current Continuous 50 mA
out
Surge 100 mA
I V Sink/Source 0.5 mA
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T Operating Temperature Range 40 to +85 C
A
T Storage Temperature Range 65 to +150 C
stg
Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC20 WB 90 C/W
JA
500 lfpm SOIC20 WB 60 C/W
Thermal Resistance (Junction-to-Case) Standard Board SOIC20 WB 30 to 35 C/W
JC
T Wave Solder (Pb-Free) 265 C
sol
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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