5 VDifferential PECL to TTL Translator MC10ELT21, MC100ELT21 Description The MC10ELT/100ELT21 is a differential PECL to TTL translator. www.onsemi.com Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the ELT21 makes it ideal for those applications where space, 8 performance and low power are at a premium. 1 The V pin, an internally generated voltage supply, is available to BB SOIC8 this device only. For single-ended input conditions, the unused D SUFFIX differential input is connected to V as a switching reference voltage. BB CASE V may also rebias AC coupled inputs. When used, decouple V 75107 BB BB and V via a 0.01 F capacitor and limit current sourcing or sinking CC to 0.5 mA. When not used, V should be left open. MARKING DIAGRAMS* BB The 100 Series contains temperature compensation. 8 8 Features HLT21 KLT21 3.5 ns Typical Propagation Delay ALYW ALYW 24 mA TTL Output 1 1 Flow Through Pinouts Operating Range: V = 4.75 V to 5.25 V with GND = 0 V CC H = MC10 K = MC100 Q Output Will Default LOW with Inputs Left Open or < 1.3 V A = Assembly Location These Devices are PbFree, Halogen Free/BFR Free and are RoHS L = Wafer Lot Compliant Y = Year W = Work Week = PbFree Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping MC10ELT21DG SOIC8 98 Units / Tube (PbFree) MC10ELT21DR2G SOIC8 2500 / (PbFree) Tape & Reel MC100ELT21DG SOIC8 98 Units / Tube (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifica- tions Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: April, 2021 Rev. 14 MC10ELT21/DMC10ELT21, MC100ELT21 Table 1. PIN DESCRIPTION NC 1 8 V CC Pin Function Q0 TTL Outputs TTL D0 2 Q0 7 D0, DO PECL Differential Outputs PECL V Reference Voltage Output BB D0 3 6 NC V Positive Supply CC GND Ground NC No Connect V45 BB GND Figure 1. 8Lead Pinout and Logic Diagram (Top View) Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 50 k Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) PbFree Pkg SOIC8 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 81 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Power Supply GND = 0 V 7 V CC V PECL Input Voltage GND = 0 V V V 0 to 6 V IN I CC I V Sink/Source 0.5 mA BB BB TA Operating Temperature Range 40 to +85 C T Storage Temperature Range 65 to +150 C stg Thermal Resistance (JunctiontoAmbient) 0 lfpm SOIC8 190 C/W JA 500 lfpm SOIC8 130 C/W Thermal Resistance (JunctiontoCase) Standard Board SOIC8 41 to 44 C/W JC T Wave Solder PbFree <2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2