MC100EP14DTG ON Semiconductor

MC100EP14 3.3V / 5V1:5 Differential ECL/PECL/HSTL Clock Driver Description The MC100EP14 is a low skew 1to5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input MC100EP14 V EN V CLK1 CLK1 V CLK0 CLK0 CLK SEL V CC CC BB EE 20 19 18 17 16 15 14 13 12 11 10 D Q 1 2 3 4 5678 9 10 Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 WARNING: All V and V pins must be externally connected CC EE to Power Supply to guarantee proper operation. Figure 1. TSSOP20 (Top View) and Logic Diagram Table 1. PIN DESCRIPTION Table 2. FUNCTION TABLE Pin Function CLK0 CLK1 CLK SEL EN Q CLK0*, CLK0** ECL/PECL/HSTL CLK Input L X L L L H X L L H CLK1*, CLK1** ECL/PECL/HSTL CLK Input X L H L L X H H L H Q0:4, Q0:4 ECL/PECL Outputs X X X H L* CLK SEL* ECL/PECL Active Clock Select Input * On next negative transition of CLK0 or CLK1 EN* ECL Sync Enable V Reference Voltage Output BB V Positive Supply CC V Negative Supply EE * Pins will default low when left open. ** Pins will default to V /2 when left open. CC