MC10E175FNR2G ON Semiconductor

MC10E175, MC100E175 5V ECL 9-Bit Latch With Parity Description The MC10E/100E175 is a 9-bit latch. It also features a tenth latched output, ODDPAR, which is formed as the odd parity of the nine data MC10E175, MC100E175 D D D V Q Q V 6 7 8 CCO 8 7 CCO D Q Q 25 24 23 22 21 20 19 D 0 0 Q 18 D 26 6 5 EN R Q 17 D 27 5 4 BITS 28 16 V D CC 17 3 1 Pinout: 28-Lead PLCC 15 Q V 4 Q EE D D Q 8 8 (Top View) EN 2 14 Q LEN 3 R 3 13 V MR CCO D 4 Q 12 2 2 Q D ODDPAR 56 7 8 9 10 11 EN D D V Q V Q 1 0 CCO 0 CCO 1 R LEN * All V and V pins are tied together on the die. CC CCO MR Warning: All V , V , and V pins must be externally CC CCO EE Figure 2. Logic Diagram connected to Power Supply to guarantee proper operation. Figure 1. 28Lead Pinout Assignment Table 1. PIN DESCRIPTION PIN FUNCTION D D ECL Data Inputs 0 8 LEN ECL Latch Enable MR ECL Master Reset Q Q ECL Data Outputs 0 8 ODDPAR ECL Parity Output V , V Positive Supply CC CCO V Negative Supply EE NC No Connect Table 2. FUNCTION TABLE D EN MR Q ODDPAR H L L H H if odd no. of Dn HIGH L L L L H if odd no. of Dn HIGH X H L Q Q 0 0 X X H L L