Product Information

MC10EP57MNG

MC10EP57MNG electronic component of ON Semiconductor

Datasheet
Encoders, Decoders, Multiplexers & Demultiplexers BBG ECL MLTPLXR DIFF

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 14.0415 ea
Line Total: USD 14.04

10 - Global Stock
Ships to you between
Thu. 02 May to Mon. 06 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
10 - Global Stock


Ships to you between Thu. 02 May to Mon. 06 May

MOQ : 1
Multiples : 1

Stock Image

MC10EP57MNG
ON Semiconductor

1 : USD 14.0415
10 : USD 13.064
25 : USD 12.512
50 : USD 10.787
92 : USD 10.7525
276 : USD 10.557
552 : USD 10.373
1012 : USD 10.2465
2576 : USD 10.235

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product
Logic Family
Number of Input Lines
Number of Output Lines
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Series
Brand
Number Of Lines In/Out
Factory Pack Quantity :
Function
Height
Length
Width
Logic Type
Cnhts
High Level Output Current
Hts Code
Low Level Output Current
Mxhts
Operating Supply Voltage
Product Type
Subcategory
Taric
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MC10EP57, MC100EP57 3.3V / 5VECL 4:1 Differential Multiplexer Description The MC10/100EP57 is a fully differential 4:1 multiplexer. By leaving the SEL1 line open (pulled LOW via the input pulldown MC10EP57, MC100EP57 V SEL1 SEL0 V Q V V V V Q CC CC CC BB1 BB2 EE 20 19 18 17 16 15 14 13 12 11 4:1 1 2 3 4 567 8 9 10 V D0 D0 D1 D1 D2 D2 D3 D3 V CC EE Warning: All V and V pins must be externally connected CC EE to Power Supply to guarantee proper operation. Figure 1. 20Lead Package (Top View) and Logic Diagram Exposed Pad D0 V V SEL1 SEL0 CC CC 20 19 18 17 16 D0 1 15 V CC D1 2 14 Q D1 MC10/100EP57 3 13 Q 4 D2 12 V CC D2 5 11 V BB1 67 8 9 10 D3 D3 V V V EE EE BB2 NOTE: The Exposed Pad (EP) on package bottom must be attached to a heatsinking conduit. The Exposed Pad may only be electrically connected to V . EE Figure 1. QFN20 Pinout (Top View) Table 1. PIN DESCRIPTION Table 2. TRUTH TABLE PIN FUNCTION SEL1 SEL0 DATA OUT D0 3*, D0 3* ECL Differential Data Inputs L L D0, D0 SEL0*, SEL1* ECL MUX Select Inputs L H D1, D1 V , V ECL Reference Output Voltage H L D2, D2 BB1 BB2 Q, Q ECL Data Outputs H H D3, D3 V Positive Supply CC V Negative Supply EE EP Exposed Pad *Pins will default LOW when left open.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Aptina / ON Semiconductor
FAIRCHILD
FAIRCHILD (ON SEMICONDUCTOR)
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FS8
FSC
ON
ON SEMI
ON Semicon
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ON4
ON5
onsemi
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onsemi / Fairchild
OOF
Xsens / Fairchild

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