MC10H135 Dual JK MasterSlave FlipFlop Description The MC10H135 is a dual J-K master-slave flip-flop. The device is provided with an asynchronous set(s) and reset(R). These set and reset www.onsemi.com inputs overide the clock. A common clock is provided with separate J-K inputs. When the clock is static, the JK inputs do not effect the output. The output states of the flip flop change on the positive transition of the clock. 16 20 1 Features 1 Propagation delay, 1.5 ns Typical PDIP16 PLLC20 P SUFFIX FN SUFFIX Power Dissipation, 280 mW Typical/Pkg. (No Load) CASE 64808 CASE 77502 f 250 MHz Max tog Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) MARKING DIAGRAMS* Voltage Compensated MECL 10K Compatible 120 These Devices are Pb-Free, Halogen Free and are RoHS Compliant 16 MC10H135P 10H135G AWLYYWWG AWLYYWW 1 PDIP16 PLLC20 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping MC10H135FNG PLLC20 46 Units / Tube (Pb-Free) MC10H135FNR2G PLLC20 500 Tape & Reel (Pb-Free) 25 Units / Tube MC10H135PG PDIP16 (Pb-Free) For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: August, 2016 Rev. 9 MC10H135/DMC10H135 S1 5 Table 1. RS TRUTH TABLE Q1 2 J1 7 R S Q n+1 K1 6 L L Q n Q1 3 L H H R1 4 V = PIN 1 CC1 V = PIN 16 C 9 H L L CC2 V = PIN 8 S2 12 EE H H ND Q2 15 ND = Not Defined J2 10 Table 2. CLOCK J-K TRUTH TABLE* K2 Q2 14 11 J K Q n+1 R2 13 L L Q n Figure 1. Logic Diagram H L L L H H V 1 16 V CC1 CC2 H H Q n Q1 2 15 Q2 *Output states change on positive transition of clock for J - K input Q1 3 14 Q2 condition present. R1 4 13 R2 S1 5 12 S2 K1 6 11 K2 J1 7 10 J2 V 8 9 C EE Pin assignment is for Dual-in-Line Package. Figure 2. Pin Assignment Table 3. MAXIMUM RATINGS Symbol Characteristic Rating Unit V Power Supply (V = 0) 8.0 to 0 Vdc EE CC V Input Voltage (V = 0) 0 to V Vdc I CC EE I Output Current mA out Continuous 50 Surge 100 T Operating Temperature Range 0 to +75 C A T Storage Temperature Range C stg Plastic 55 to +150 Ceramic 55 to +165 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2