MC74AC138NG ON Semiconductor

MC74AC138, MC74ACT138 1of8 Decoder/Demultiplexer The MC74AC138/74ACT138 is a high speed 1 of 8 decoder/demultiplexer. This device is ideally suited for highspeed bipolar memory chip select address decoding. MC74AC138, MC74ACT138 FUNCTIONAL DESCRIPTION HIGH. This multiple enabled function allows easy parallel expansion of the device to a 1of32 (5 lines to 32 lines) The MC74AC138/74ACT138 high speed 1of8 decoder with just four MC74AC138/74ACT138 devices decoder/demultiplexer accepts three binary weighted inputs and one inverter (See Figure 4). The (A , A , A ) and, when enabled, provides eight mutually 0 1 2 MC74AC138/74ACT138 can be used as an 8output exclusive activeLOW outputs (O O). The 0 7 demultiplexer by using one of the active LOW Enable inputs MC74AC138/74ACT138 features three Enable inputs, two as the data input and the other Enable inputs as strobes. The activeLOW (E , E ) and one activeHIGH (E ). All 1 2 3 Enable inputs which are not used must be permanently tied outputs will be HIGH unless E and E are LOW and E is 1 2 3 to their appropriate activeHIGH or activeLOW state. TRUTH TABLE Inputs Outputs E E E A A A O O O O O O O O 1 2 3 0 1 2 0 1 2 3 4 5 6 7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial E E E 1 2 3 A A 2 1 A 0 0 0 0 0 0 0 0 0 7 6 5 4 3 2 1 0 NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram