MC74AC4040DR2G ON Semiconductor

MC74AC4040 12-Stage Binary Ripple Counter The MC74AC4040 consists of 12 master-slave flip-flops. The output of each flip-flop feeds the next and the frequency at each output is half that of the preceding one. The state of the counter advances on www.onsemi.com the negative-going edge of the Clock input. Reset is asynchronous and active-high. State changes of the Q outputs do not occur simultaneously because MARKING of internal ripple delays. Therefore, decoded output signals are subject DIAGRAM to decoding spikes and may have to be gated with the Clock of the 16 MC74AC4040 for some designs. SOIC16 AC4040G D SUFFIX 16 AWLYWW CASE 751B Features 1 1 140 MHz Typ. Clock A = Assembly Location Outputs Source/Sink 24 mA WL = Wafer Lot Operating Voltage Range: 2.0 to 6.0 V Y = Year High Noise Immunity WW = Work Week G = PbFree Package These are PbFree Devices V Q11 Q10 Q8 Q9 RESET CLK Q1 CC 16 15 14 13 12 11 10 9 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. 1 2 34567 8 Q12 Q6 Q5 Q7 Q4 Q3 Q2 GND Figure 1. Pinout: 16Lead Packages Conductors (Top View) FUNCTION TABLE Clock Reset Output State L No Change L Advance to next state X H All Outputs are low Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: March, 2015 Rev. 8 MC74AC4040/DMC74AC4040 9 Q1 7 Q2 6 Q3 5 Q4 10 3 Q5 CLOCK 2 Q6 4 Q7 13 Q8 12 Q9 14 Q10 15 Q11 1 Q12 11 RESET PIN 16 = V CC PIN 8 = GND Figure 2. Logic Diagram www.onsemi.com 2