Product Information

MC74AC574NG

MC74AC574NG electronic component of ON Semiconductor

Datasheet
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin PDIP Rail

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

617: USD 0.6823 ea
Line Total: USD 420.98

0 - Global Stock
MOQ: 617  Multiples: 617
Pack Size: 617
Availability Price Quantity
0 - WHS 1


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 617
Multiples : 617

Stock Image

MC74AC574NG
ON Semiconductor

617 : USD 0.6823

0 - WHS 2


Ships to you between Fri. 17 May to Thu. 23 May

MOQ : 121
Multiples : 1

Stock Image

MC74AC574NG
ON Semiconductor

121 : USD 0.1208
500 : USD 0.1015
1000 : USD 0.0818
2500 : USD 0.0787
5000 : USD 0.0756
10000 : USD 0.0725

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Family
Logic Type
Polarity
Input Type
Output Type
Propagation Delay Time
High Level Output Current
Low Level Output Current
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Brand
Number Of Input Lines
Number Of Output Lines
Factory Pack Quantity :
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MC74AC574, MC74ACT574 Octal D FlipFlop with 3State Outputs The MC74AC574/74ACT574 is a highspeed, low power octal flipflop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is MC74AC574, MC74ACT574 FUNCTIONAL DESCRIPTION FUNCTION TABLE The MC74AC574/74ACT574 consists of eight edge- Inputs Internal Outputs Function triggered flipflops with individual Dtype inputs and OE CP D Q O n 3state true outputs. The buffered clock and buffered Output H H L NC Z Hold Enable are common to all flipflops. The eight flipflops H HH NC Z Hold will store the state of their individual D inputs that meet the H LL Z Load setup and hold time requirements on the LOWtoHIGH H HH Z Load Clock (CP) transition. With the Output Enable (OE) LOW, L LL L Data Available the contents of the eight flipflops are available at the L HH H Data Available outputs. When OE is HIGH, the outputs go to the high L HL NC NC No Change in Data impedance state. Operation of the OE input does not affect L H H NC NC No Change in Data the state of the flipflops. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOW-to-HIGH Clock Transition NC = No Change D D D D D D D D 0 1 2 3 4 5 6 7 CP CD CD CD CD CD CD CD CD Q Q Q Q Q Q Q Q OE O O O O O O O O 0 1 2 3 4 5 6 7 NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram MAXIMUM RATINGS Symbol Parameter Value Unit V DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V CC V DC Input Voltage (Referenced to GND) 0.5 to V +0.5 V IN CC V DC Output Voltage (Referenced to GND) 0.5 to V +0.5 V OUT CC I DC Input Current, per Pin 20 mA IN I DC Output Sink/Source Current, per Pin 50 mA OUT I DC V or GND Current per Output Pin 50 mA CC CC T Storage Temperature 65 to +150 C stg Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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