MC74HC4060A 14-Stage Binary Ripple Counter With Oscillator HighPerformance SiliconGate CMOS The MC74HC4060A is identical in pinout to the standard CMOS www.onsemi.com MC14060B. The device inputs are compatible with standard CMOS outputs with pullup resistors, they are compatible with LSTTL outputs. This device consists of 14 masterslave flipflops and an oscillator with a frequency that is controlled either by a crystal or by an RC SOIC16 TSSOP16 circuit connected externally. The output of each flipflop feeds the D SUFFIX DT SUFFIX CASE 751B CASE 948F next and the frequency at each output is half of that of the preceding one. The state of the counter advances on the negativegoing edge of PIN ASSIGNMENT the Osc In. The activehigh Reset is asynchronous and disables the Osc Osc oscillator to allow very low power consumption during standby V Q10 Q8 Q9 Reset Osc In Out 1 Out 2 CC operation. 16 15 14 13 12 11 10 9 State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and may have to be gated with Osc Out 2 of the HC4060A. Features 1 2 3 45 67 8 Output Drive Capability: 10 LSTTL Loads Q12 Q13 Q14 Q6 Q5 Q7 Q4 GND Outputs Directly Interface to CMOS, NMOS, and TTL 16Lead Package (Top View) Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1 A MARKING DIAGRAMS High Noise Immunity Characteristic of CMOS Devices 16 16 In Compliance With JEDEC Standard No. 7A Requirements HC40 Chip Complexity: 390 FETs or 97.5 Equivalent Gates HC4060AG 60A ALYW AWLYWW NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 1 1 Qualified and PPAP Capable SOIC16 TSSOP16 These Devices are PbFree, Halogen Free/BFR Free and are RoHS A = Assembly Location Compliant L, WL = Wafer Lot Y, YY = Year LOGIC DIAGRAM W, WW = Work Week G or = PbFree Package Osc Out 1 Osc Out 2 (Note: Microdot may be in either location) 10 9 7 Q4 FUNCTION TABLE 5 Q5 11 4 Clock Reset Output State Q6 Osc In 6 L No Change Q7 14 Q8 L Advance to Next State 13 Q9 X H All Outputs Are Low 15 Q10 1 Q12 2 ORDERING INFORMATION Q13 3 See detailed ordering and shipping information in the package Q14 dimensions section on page 4 of this data sheet. 12 Pin 16 = V CC Reset Pin 8 = GND Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: June, 2016 Rev. 10 MC74HC4060A/DMC74HC4060A MAXIMUM RATINGS Symbol Parameter Value Unit This device contains protection circuitry to guard against damage V DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V CC due to high static voltages or electric V DC Input Voltage (Referenced to GND) 0.5 to V + 0.5 V in CC fields. However, precautions must be taken to avoid applications of any V DC Output Voltage (Referenced to GND) 0.5 to V + 0.5 V out CC voltage higher than maximum rated I DC Input Current, per Pin 20 mA in voltages to this highimpedance cir- cuit. For proper operation, V and I DC Output Current, per Pin 25 mA in out V should be constrained to the out I DC Supply Current, V and GND Pins 50 mA CC CC range GND (V or V ) V . in out CC P Power Dissipation in Still Air, SOIC Package 500 mW Unused inputs must always be D TSSOP Package 450 tied to an appropriate logic voltage level (e.g., either GND or V ). CC T Storage Temperature Range 65 to + 150 C stg Unused outputs must be left open. T Lead Temperature, 1 mm from Case for 10 Seconds C L SOIC or TSSOP Package 260 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Derating: SOIC Package: 7 mW/ C from 65 to 125 C TSSOP Package: 6.1 mW/ C from 65 to 125 C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V DC Supply Voltage (Referenced to GND) 2.5* 6.0 V CC V , V DC Input Voltage, Output Voltage (Referenced to GND) 0 V V in out CC T Operating Temperature Range, All Package Types 55 +125 C A t , t Input Rise/Fall Time V = 2.0 V 0 1000 ns r f CC (Figure 1) V = 4.5 V 0 500 CC V = 6.0 V 0 400 CC Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. *The oscillator is guaranteed to function at 2.5 V minimum. However, parametrics are tested at 2.0 V by driving Pin 11 with an external clock source. DC CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit V CC V 55 to 25C 85C 125C Symbol Parameter Condition Unit V Minimum HighLevel Input Voltage V = 0.1V or V 0.1V 2.0 1.50 1.50 1.50 V IH out CC I 20 A 3.0 2.10 2.10 2.10 out 4.5 3.15 3.15 3.15 6.0 4.20 4.20 4.20 V Maximum LowLevel Input Voltage V = 0.1V or V 0.1V 2.0 0.50 0.50 0.50 V IL out CC I 20 A 3.0 0.90 0.90 0.90 out 4.5 1.35 1.35 1.35 6.0 1.80 1.80 1.80 V Minimum HighLevel Output Voltage V = V or V 2.0 1.9 1.9 1.9 V OH in IH IL (Q4Q10, Q12Q14) I 20 A 4.5 4.4 4.4 4.4 out 6.0 5.9 5.9 5.9 V =V or V I 2.4mA 3.0 2.48 2.34 2.20 in IH IL out I 4.0mA 4.5 3.98 3.84 3.70 out I 5.2mA 6.0 5.48 5.34 5.20 out V Maximum LowLevel Output Voltage V = V or V 2.0 0.1 0.1 0.1 V OL in IH IL (Q4Q10, Q12Q14) 4.5 0.1 0.1 0.1 I 20 A out 6.0 0.1 0.1 0.1 V = V or V I 2.4mA 3.0 0.26 0.33 0.40 in IH IL out I 4.0mA 4.5 0.26 0.33 0.40 out I 5.2mA 6.0 0.26 0.33 0.40 out www.onsemi.com 2