MC74LVX373DWR2G ON Semiconductor

MC74LVX373 Octal D-Type Latch with 3-State Outputs With 5VTolerant Inputs The MC74LVX373 is an advanced high speed CMOS octal latch MC74LVX373 1 OE 11 LE 2 nLE O0 3 Q D0 D 5 nLE O1 4 Q D1 D 6 nLE O2 7 Q D2 D 9 nLE O3 8 Q D3 D 12 nLE O4 13 Q D4 D 15 nLE O5 14 Q D5 D 16 nLE O6 17 Q D6 D 19 nLE O7 18 Q D7 D Figure 1. Logic Diagram INPUTS OUTPUTS OE LE Dn On OPERATING MODE L H H H Transparent (Latch Disabled); Read Latch L H L L L L h H Latched (Latch Enabled) Read Latch L L l L L L X NC Hold; Read Latch H L X Z Hold; Disabled Outputs H H H Z Transparent (Latch Disabled); Disabled Out- H H L Z puts H L h Z Latched (Latch Enabled); Disabled Outputs H L l Z H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Latch Enable HightoLow Transition; L = Low Voltage Level; l = Low Voltage Level One Setup Time Prior to the Latch Enable HightoLow Transition; NC = No Change, State Prior to the Latch Enable HightoLow Transition; X = High or Low Voltage Level or Transitions are Acceptable; Z = High Impedance State; For I Reasons DO NOT CC FLOAT Inputs