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ML4800
Power Factor Correction and PWM Controller
Combo
Features General Description
Internally synchronized leading-edge PFC and trailing- The ML4800 is a controller for power factor corrected,
edge PWM in one IC switched mode power supplies. Power Factor Correction
TriFault Detect for UL1950 compliance and enhanced (PFC) allows the use of smaller, lower cost bulk capacitors,
safety reduces power line loading and stress on the switching FETs,
Slew rate enhanced transconductance error amplier for and results in a power supply that fully complies with
ultra-fast PFC response IEC1000-3-2 specication. Intended as a BiCMOS version
Low power: 200A startup current, 5.5mA operating of the industry-standard ML4824, the ML4800 includes
current circuits for the implementation of leading edge, average
Low total harmonic distortion, high PF current, boost type power factor correction and a trailing
Reduced ripple current in storage capacitor between PFC edge, pulse width modulator (PWM). It also includes a
and PWM sections TriFault Detect function to help ensure that no unsafe
Average current, continuous boost leading edge PFC conditions will result from single component failure in the
PWM congurable for current-mode or voltage mode PFC. Gate-drivers with 1A capabilities minimize the need
operation for external driver circuits. Low power requirements improve
Current fed gain modulator for improved noise immunity efciency and reduce component costs.
Overvoltage and brown-out protection, UVLO, and soft
start An over-voltage comparator shuts down the PFC section in
the event of a sudden decrease in load. The PFC section also
includes peak current limiting and input voltage brownout
protection. The PWM section can be operated in current or
voltage mode, at up to 250kHz, and includes an accurate
50% duty cycle limit to prevent transformer saturation.
Block Diagram
13
16 1
VEAO IEAO POWER FACTOR CORRECTOR V
CC
V
CC
TRI-FAULT OVP
V
17V
V VEA REF
0.5V +
FB
+ 7.5V
14
15 -
IEA REFERENCE
1.6k -
2.75V -
+
2.5V +
+
S Q
I
AC -
-
2
-1V +
GAIN
V R Q
RMS
-
MODULATOR
4
PFC OUT
1.6k
PFC I
I
LIMIT S Q 12
SENSE
3
R Q
RAMP 1
7 OSCILLATOR
RAMP 2
DUTY CYCLE
8
LIMIT
-
V
DC 1.25V
6 +
PWM OUT
V
CC S Q
- 11
V OK
IN
V -
25 A FB
SS
+ 1.0V -
R Q
5 2.45V
+
+
DC I
LIMIT
DC I
V
LIMIT
REF
9
V UVLO
CC
PULSE WIDTH MODULATOR
REV. 1.0.5 9/25/01
ML4800 PRODUCT SPECIFICATION
Pin Conguration
ML4800
16-Pin PDIP (P16)
16-Pin Narrow SOIC (S16N)
IEAO 1 16 VEAO
I 2 15 V
AC FB
I 3 14 V
SENSE REF
V 4 13 V
RMS CC
SS 5 12 PFC OUT
V 6 11 PWM OUT
DC
RAMP 1 7 10 GND
RAMP 2 8 9 DC I
LIMIT
TOP VIEW
Pin Description
Pin Name Function
1 IEAO Slew rate enhanced PFC transconductance error amplifier output
2I PFC AC line reference input to Gain Modulator
AC
3I Current sense input to the PFC Gain Modulator
SENSE
4V PFC Gain Modulator RMS line voltage compensation input
RMS
5 SS Connection point for the PWM soft start capacitor
6V PWM voltage feedback input
DC
7 RAMP 1 Oscillator timing node; timing set by R C
T T
8 RAMP 2 When in current mode, this pin functions as the current sense input; when in voltage mode,
it is the PWM modulation ramp input.
9 DC I PWM cycle-by-cycle current limit comparator input
LIMIT
10 GND Ground
11 PWM OUT PWM driver output
12 PFC OUT PFC driver output
13 V Positive supply
CC
14 V Buffered output for the internal 7.5V reference
REF
15 V PFC transconductance voltage error amplifier input
FB
16 VEAO PFC transconductance voltage error amplifier output
2 REV. 1.0.5 9/25/01