MM74HC125, MM74HC126 3-STATE Quad Buffers February 2008 MM74HC125, MM74HC126 3-STATE Quad Buffers Features General Description Typical propagation delay: 13ns The MM74HC125 and MM74HC126 are general pur- pose 3-STATE high speed non-inverting buffers utilizing Wide operating voltage range: 2V6V advanced silicon-gate CMOS technology. They have Low input current: 1A maximum high drive current outputs which enable high speed oper- Low quiescent current: 80A maximum (74HC) ation even when driving large bus capacitances. These Fanout of 15 LS-TTL loads circuits possess the low power dissipation of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs. The MM74HC125 require the 3-STATE control input C to be taken high to put the output into the high impedance condition, whereas the MM74HC126 require the control input to be low to put the output into high impedance. All inputs are protected from damage due to static discharge by diodes to V and ground. CC Ordering Information Package Order Number Number Package Description MM74HC125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HC125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC125N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide MM74HC126M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HC126SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC126MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC126N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC125, MM74HC126 Rev. 1.3.0MM74HC125, MM74HC126 3-STATE Quad Buffers Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Top View (MM74HC125) Top View (MM74HC126) Truth Tables Inputs Output Inputs Output AC Y AC Y HLH HHH LLL LHL XH Z XL Z MM74HC125 MM74HC126 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC125, MM74HC126 Rev. 1.3.0 2