NB3N201S, NB3N206S 3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver Description www.onsemi.com The NB3N20xS Series are pure 3.3 V supply differential Multipoint Low Voltage (MLVDS) line Drivers and Receivers. Devices MARKING NB3N201S and NB3N206S are TIA/EIA899 compliant. NB3N201S DIAGRAMS 8 offers the Type 1 receiver threshold at 0.0 V. NB3N206S offers the 8 Type 2 receiver threshold at 0.1 V. 1 NB20x These devices have Type1 and Type2 receivers that detect the bus SOIC8 AYWW state with as little as 50 mV of differential input voltage over a D SUFFIX CASE 751 1 commonmode voltage range of 1 V to 3.4 V. The Type1 receivers have near zero thresholds (50 mV) and exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly NB20x = Specific Device Code x = 1, 6 changing signals or loss of input. Type2 receivers include an offset A = Assembly Location threshold to provide a detectable voltage under opencircuit, idlebus, Y = Year and other faults conditions. WW = Work Week NB3N201S and NB3N206S support Simplex or Half Duplex bus G or = PbFree Package configurations. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 18 of this data sheet. Features LowVoltage Differential 30 to 55 Line Drivers MLVDS Bus Power Up/Down Glitch Free and Receivers for Signaling Rates Up to 200 Mbps Operating range: VCC = 3.3 10% V( 3.0 to 3.6 V) Type1 Receivers Incorporate 25 mV of Hysteresis Operation from 40C to 85C. Type2 Receivers Provide an Offset (100 mV) These are PbFree Devices Threshold to Detect OpenCircuit and IdleBus Applications Conditions LowPower HighSpeed ShortReach Alternative to Meets or Exceeds the MLVDS Standard TIA/EIA899 TIA/EIA485 for Multipoint Data Interchange Backplane or Cabled Multipoint Data and Clock Controlled Driver Output Voltage Transition Times for Transmission Improved Signal Quality Cellular Base Stations 1 V to 3.4 V CommonMode Voltage Range Allows Data Transfer With up to 2 V of Ground Noise CentralOffice Switches Bus Pins High Impedance When Disabled or VCC Network Switches and Routers 1.5 V Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: June, 2015 Rev. 1 NB3N201S/DNB3N201S, NB3N206S R 1 8 V CC RE B 2 7 DE 3 A 6 4 D GND 5 SOIC8 NB3N201S, NB3N206S Figure 1. Logic Diagram Figure 2. Pinout Diagram (Top View) Table 1. PIN DESCRIPTION Number Name I/O Type Open Default Description 1 R LVCMOS Output Receiver Output Pin 2 RE LVCMOS Input High Receiver Enable Input Pin (LOW = Active, HIGH = High Z Output) 3 DE LVCMOS Input Low Driver Enable Input Pin (LOW = High Z Output, HIGH=Active) 4 D LVCMOS Input Driver Input Pin 5 GND Ground Supply pin. Pin must be connected to power supply to guarantee proper operation. 6 A MLVDS Input Transceiver True Input /Output Pin /Output 7 B MLVDS Input Transceiver Invert Input /Output Pin /Output 8 VCC Power Supply pin. Pin must be connected to power supply to guarantee proper operation. www.onsemi.com 2