NB6L16 2.5 V / 3.3 V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/ www.onsemi.com Driver/Translator Buffer Description 8 8 The NB6L16 is a high precision, low power ECL differential clock 1 1 or data receiver/driver/translator buffer. The device is functionally SOIC8 NB TSSOP8 equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With D SUFFIX DT SUFFIX output transition times of 70 ps, it is ideally suited for high frequency, CASE 75107 CASE 948R02 low power systems. The device is targeted for Backplane buffering, GbE clock/data distribution, Fibre Channel distribution and SONET clock/data distribution applications. MARKING DIAGRAMS* Input accept LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. Outputs are 800 mV 8 8 ECL signals. 6L16 The V pin, an internally generated voltage supply, is available to 6L16 BB ALYW ALYW this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. BB 1 1 V may also rebias AC coupled inputs. When used, decouple V BB BB and V via a 0.01 F capacitor and limit current sourcing or sinking SOIC8 NB TSSOP8 CC to 0.5 mA. When not used, V should be left open. BB A = Assembly Location L = Wafer Lot Features Y = Year Input Clock Frequency 6 GHz W = Work Week Input Data Rate Frequency 6 Gb/s = Pb-Free Package (Note: Microdot may be in either location) Low 12 mA Typical Power Supply Current *For additional marking information, refer to 70 ps Typical Rise/Fall Times Application Note AND8002/D. 130 ps Input Propagation Delay On-Chip Reference for ECL Single-Ended Input V Output BB PECL Mode Operating Range: ORDERING INFORMATION V = 2.375 V to 3.465 V with V = 0 V CC EE NECL Mode Operating Range: Device Package Shipping V = 0 V with V = 2.375 V to 3.465 V CC EE NB6L16DG SOIC8 NB 98 Units / Tube Open Input Default State (Pb-Free) LVDS, LVPECL, LVNECL, LVCMOS, LVTTL and CML Input NB6L16DR2G SOIC8 NB 2500 Tape & Reel (Pb-Free) Compatible NB6L16DTG TSSOP8 100 Units / Tube These Devices are Pb-Free, Halogen Free and are RoHS Compliant (Pb-Free) NB6L16DTR2G TSSOP8 2500 Tape & Reel (Pb-Free) For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: August, 2016 Rev. 9 NB6L16/DNB6L16 V 1 8 CC NC R2 D 2 7 Q R1 R1 3 6 D Q R2 V V BB EE 45 Figure 1. Pinout (Top View) and Logic Diagram Table 1. PIN DESCRIPTION Pin Name I/O Default State Description 1 NC No Connect. The NC pin is electrically connected to the die and MUST be left open. 2 D LVDS, CML, LVPECL, LOW Non-inverted differential clock/data input. Internal 75 k to V and CC LVNECL, LVTTL, LVCMOS 37.5 k to V . EE Input 3 D LVDS, CML, LVPECL, HIGH Inverted differential clock/data input. Internal 37.5 k to V and 75 k CC LVNECL, LVTTL, LVCMOS to V . EE Input 4 V Internally generated ECL reference voltage supply. BB 5 V Negative power supply voltage. EE 6 Q ECL Output Inverted differential ECL output. Typically terminated with 50 resistor to V 2.0 V. CC 7 Q ECL Output Non-inverted differential ECL output. Typically terminated with 50 resistor to V 2.0 V. CC 8 V Positive power supply voltage. CC Table 2. ATTRIBUTES Characteristics Value Internal Input Default State Resistor (R1) 37.5 k Internal Input Default State Resistor (R2) 75 k ESD Protection Human Body Model > 2 kV Machine Model > 100 V Charged Device Model > 1 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8 NB Level 1 TSSOP8 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 1.125 in Transistor Count 167 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2