NCN1188 Data Switch, 3:1 High Speed USB Switch with Audio and MHL Capability The NCN1188 allows portable systems to share a single USB 2.0 or 3.0 receptacle to transmit and receive paired signals from three separate locations. All of the three differential channels are compliant www.onsemi.com to High Speed USB 2.0, Full Speed USB 1.1, Low Speed USB 1.0 and any generic UART protocol. The two dedicated high speed data paths MARKING also support Mobile High Definition Link (MHL) video up to DIAGRAM resolutions of 1080i (2.25 Gbps) and 1080p (3 Gbps in Packed Pixel mode). The multipurpose audio path is capable of passing signals UQFN12 AGM MU SUFFIX with negative voltages as low as 2 V below ground and features shunt CASE 523AE 1 resistors to reduce Pop and Click noise in the audio system. The NCN1188 is housed in a space saving, ultra low profile 2.0 x 1.7 x AG = Specific Device Code 0.5 mm, 12 pins UQFN package. M = Date Code Features = PbFree Package High Bandwidth of 1.8 GHz V Operating Range from 2.7 V to 5.5 V CC PIN ASSIGNMENTS V Signal from 0 V to 3.7 V for Data Transfer IS V Signal from 2 V to 2 V for Stereo Headphone Connection IS Audio Shunt resistor for Pop & Click Noise Reduction V Control Pins Compatible to 1.8V Interfaces IO Low Power Consumption of 23 A Small UQFN 2.0 x 1.7 x 0.5 mm Package These Devices are PbFree and are RoHS Compliant Typical Applications USB 2.0 / 3.0 MicroB Applications USB to HDMI Video Interfaces via MHL Features Phones and Smart Phones Digital Cameras Handset Media Players (Top View) ORDERING INFORMATION Device Package Shipping NCN1188MUTAG UQFN12 3000 / (PbFree) Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Figure 1. NCN1188 Typical Application Schematic Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: January, 2016 Rev. 4 NCN1188/DNCN1188 NCN1188 TRUTH TABLE Function IN1 IN2 Shunt HiZ 0 0 Enable DN / DP 0 1 Enable AUDN / AUDP 1 0 Disable HDN / HDP 1 1 Enable SIMPLIFIED BLOCK DIAGRAM D+ D Charge VCC Pump IN1 Logic Control IN2 DN DP HDN HDP AUDN GND AUDP Figure 2. Simplified Block Diagram www.onsemi.com 2