NCP705 LDO Regulator - Ultra-Low Quiescent Current, I 13 A, Q Ultra-Low Noise 500 mA www.onsemi.com Noise sensitive RF applications such as Power Amplifiers in satellite radios, infotainment equipment, and precision MARKING instrumentation require very clean power supplies. The NCP705 is DIAGRAM 500 mA LDO that provides the engineer with a very stable, accurate 1 voltage with ultra low noise and very high Power Supply Rejection WDFN6 XX M Ratio (PSRR) suitable for RF applications. The device doesnt require CASE 511BR any additional noise bypass capacitor to achieve ultralow noise performance. In order to optimize performance for battery operated XX = Specific Device Code M = Date Code portable applications, the NCP705 employs dynamic Iq management for ultralow quiescent current consumption at lightload conditions and great dynamic performance. PIN CONNECTIONS Features OUT 1 6 IN OUT 1 6 IN Operating Input Voltage Range: 2.5 V to 5.5 V Available Fixed Voltage Option: 0.8 V to 3.5 V N/C 2 5 N/C ADJ 2 5 N/C GND GND Available Adjustable Voltage Option: 0.8 V to 5.5 VV DROP GND 3 4 EN GND 3 4 EN Reference Voltage 0.8 V UltraLow Quiescent Current of Typ. 13 A WDFN6 2x2 mm Adjustable Version (Top View) (Top View) UltraLow Noise: 12 V from 100 Hz to 100 kHz RMS Very Low Dropout: 230 mV Typical at 500 mA 2% Accuracy Over Load/Line/Temperature ORDERING INFORMATION See detailed ordering, marking and shipping information on High PSRR: 71 dB at 1 kHz page 19 of this data sheet. Internal SoftStart to Limit the TurnOn Inrush Current Thermal Shutdown and Current Limit Protections Stable with a 1 F Ceramic Output Capacitor Active Output Discharge for Fast TurnOff These are PbFree Devices Typical Applications PDAs, Mobile Phones, GPS, Smartphones Wireless Handsets, Wireless LAN, Bluetooth , ZigBee Portable Medical Equipment Other Battery Powered Applications V V V V IN OUT OUT IN IN OUT IN OUT NCP705 R NCP705 C 1 1 C EN ADJ C 1 F EN IN OUT C N/C C IN OUT ON GND ON GND 1 F OFF 1 F 1 F OFF R 2 Fixed Voltage Version Adjustable Voltage Version Figure 1. Typical Application Schematics Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: September, 2019 Rev. 8 NCP705/DNCP705 IN ENABLE THERMAL UVLO EN LOGIC SHUTDOWN BANDGAP MOSFET REFERENCE INTEGRATED DRIVER WITH SOFTSTART CURRENT LIMIT AUTO LOW OUT POWER MODE ACTIVE DISCHARGE EN GND IN ENABLE THERMAL UVLO EN LOGIC SHUTDOWN BANDGAP MOSFET REFERENCE INTEGRATED DRIVER WITH SOFTSTART CURRENT LIMIT OUT AUTO LOW POWER MODE ACTIVE DISCHARGE ADJ EN GND Figure 2. Simplified Schematic Block Diagrams www.onsemi.com 2