NCP81381 Integrated Driver and MOSFET The NCP81381 integrates a MOSFET driver, highside MOSFET and lowside MOSFET into a single package. The driver and MOSFETs have been optimized for highcurrent www.onsemi.com DCDC buck power conversion applications. The NCP81381 integrated solution greatly reduces package parasitics and board space MARKING compared to a discrete component solution. DIAGRAM Features 81381 Capable of Average Currents up to 25 A QFN36 6x4 ALYW CASE 485DZ Capable of Switching at Frequencies up to 2 MHz 136 Capable of Peak Currents up to 60 A A = Assembly Location Compatible with 3.3 V or 5 V PWM Input L = Wafer Lot Responds Properly to 3level PWM Inputs Y = Year Option for Zero Cross Detection with 3level PWM W = Work Week = PbFree Package ZCD EN Input for Diode Emulation with 2level PWM (Note: Microdot may be in either location) Internal Bootstrap Diode Undervoltage Lockout Supports Intel Power State 4 PINOUT DIAGRAM Thermal Warning output Thermal Shutdown This is a PbFree Device 7 36 VCCD ZCD EN Applications 8 35 GL BOOT Desktop & Notebook Microprocessors 9 34 GL PHASED 10 33 GL 38 GH TEST 11 32 5 V VIN GL PHASEF 12 31 VSW PGND 13 30 VSW VIN 14 29 VSW VIN 37 VCCD VCC VIN 15 28 VSW VIN PGND THWN 16 27 VSW VIN Zero Current BOOT ZCD EN 17 26 VSW VIN Detect Enable 18 25 DRVON from controller VSW VIN DISB PWM from controller PWM PHASED VOUT PHASEF SMOD from controller SMOD VSW CGND PGND (Top View) Figure 1. Application Schematic ORDERING INFORMATION Device Package Shipping NCP81381MNTXG QFN36 2500 / Tape & (PbFree) Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: November, 2015 Rev. 1 NCP81381/D 19 6 PGND VCC 20 5 PGND CGND 21 4 PGND PWM 22 3 PGND SMOD 23 2 PGND DISB 24 1 PGND THWNNCP81381 7 35 VCCD BOOT 33 GH 25 30 VIN VCC 6 LEVEL SHIFT UVLO 12 18 VSW VCC 32 PHASEF 34 PHASED SMOD 3 DEAD SHUTDOWN TIME TEMP 19 PGND CONTROL 4 WARNING PWM SENSE 20 PGND LOGIC 21 PGND DISB 2 22 PGND LEVEL SHIFT 23 PGND 24 PGND 31 PGND 1 37 THWN PGND VCC 11 GL 10 GL ZCD ZCD EN 36 9 GL CONTROL 8 GL CGND 5 38 TEST Figure 2. Block Diagram PIN LIST AND DESCRIPTIONS Pin No. Symbol Description 1 THWN Thermal warning indicator. This is an opendrain output. When the temperature at the driver die reaches T , this pin is pulled low. THWN 2 DISB Output disable pin. When this pin is pulled to a logic high level, the driver is enabled. There is an internal pulldown resistor on this pin. 3 SMOD Skip Mode pin. 3state input (see Table 1 LOGIC TABLE): SMOD = High States of ZCD EN and PWM determine whether the NCP81381 performs ZCD or not. SMOD = Mid Connects PWM to internal resistor divider placing a bias voltage on PWM pin. Otherwise, logic is equivalent to SMOD in the high state. SMOD = Low Placing PWM into midstate pulls GH and GL low without delay. There is an internal pullup resistor to VCC on this pin. 4 PWM PWM Control Input and Zero Current Detection Enable 5 CGND Signal Ground 6 VCC Control Power Supply Input 7 VCCD Driver Power Supply Input 8 GL Low Side FET Gate Access 9 GL Low Side FET Gate Access 10 GL Low Side FET Gate Access 11 GL Low Side FET Gate Access 12 VSW Switch Node Output 13 VSW Switch Node Output 14 VSW Switch Node Output 15 VSW Switch Node Output 16 VSW Switch Node Output 17 VSW Switch Node Output 18 VSW Switch Node Output www.onsemi.com 2