Web Site: www.parallax.com Office: (916) 624-8333 Forums: forums.parallax.com Fax: (916) 624-8003 Sales: sales parallax.com Sales: (888) 512-1024 Technical: support parallax.com Tech Support: (888) 997-8267 JTAGulator 32115 Product Brief Introduction On-chip debug (OCD) interfaces can provide chip-level control of a target device and are a primary vector used by engineers, researchers, and hackers to extract program code or data, modify memory contents, or affect device operation on-the-fly. Depending on the complexity of the target device, manually locating available OCD connections can be a difficult and time consuming task, sometimes requiring physical destruction or modification of the device. Designed by Grand Idea Studio (www.grandideastudio.com), JTAGulator is an open source hardware tool that assists in identifying OCD connections from test points, vias, or component pads on a target device. Features 24 I/O channels with input protection circuitry Adjustable target voltage for level translation: 1.2V to 3.3V Supported interfaces (as of firmware v1.1.1): JTAG/IEEE 1149.1, UART/asynchronous serial USB interface (FTDI FT232) for direct connection to host computer (PC, Macintosh, or *nix) JTAGulator ( 32115) 9/6/2013 v1.1 Pg. 1/2 Quick Start The JTAGulator is powered from the host computers USB port and uses an industry-standard FTDI FT232RL device to provide the USB connectivity (drivers available from www.ftdichip.com/Drivers/ VCP.htm). The device will appear as a Virtual COM port and will have a COM port number automatically assigned to it. All communication is 115200 bps, 8 data bits, no parity, 1 stop bit. Use a terminal program (for example, HyperTerminal, PuTTY, CoolTerm, picocom, or screen) to communicate with the JTAGulator. When the JTAGulator is ready to receive commands, it will send a : to the host. It will then wait in an idle state until it receives a valid command, at which time it performs the command and returns any command-specific response. If an invalid command is received, the JTAGulator will respond with a . Set the target system voltage (VADJ) using the V command. This will ensure that the target receives signals within its acceptable logic levels. The voltage can be determined by locating and measuring VCC on the target board or by checking the data sheet of the specific component to which you will be connecting (if known). Attach the targets points to the JTAGulator using the screw-in terminal blocks or via the 2x5 male headers, starting at CH0 and incrementing sequentially as needed. Ensure there is a shared GND connection between the JTAGulator and target board. VADJ should NOT be connected to the target board (it is made available on the headers for testing and future use). The 2x5 headers are compatible with Bus Pirate probes (