IDT74ALVCH162244 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74ALVCH162244 BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: DESCRIPTION: 0.5 MICRON CMOS Technology This 16-bit buffer/driver is built using advanced dual metal CMOS Typical tSK(o) (Output Skew) < 250ps technology. The ALVCH162244 is designed specifically to improve the ESD > 2000V per MIL-STD-883, Method 3015 > 200V using performance and density of 3-state memory address drivers, clock machine model (C = 200pF, R = 0) drivers, and bus-oriented receivers and transmitters. The device can be VCC = 3.3V 0.3V, Normal Range used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides VCC = 2.7V to 3.6V, Extended Range true outputs and symmetrical active-low output-enable (OE) inputs. VCC = 2.5V 0.2V The ALVCH162244 has series resistors in the device output structure CMOS power levels (0.4 W typ. static) which will significantly reduce line noise when used with light loads. This Rail-to-Rail output swing for increased noise margin driver has been designed to drive 12mA at the designated threshold Available in TSSOP package levels. The ALVCH162244 has bus-hold which retains the inputs last state DRIVE FEATURES: whenever the input bus goes to a high impedance. This prevents floating Balanced Output Drivers: 12mA inputs and eliminates the need for pull-up/down resistors. Low switching noise APPLICATIONS: 3.3V high speed systems 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1 25 1OE 3OE 47 36 13 2 1A1 3A1 1Y1 3Y1 46 3 35 14 3Y2 1A2 1Y2 3A2 44 33 5 16 1A3 1Y3 3A3 3Y3 43 32 6 17 3Y4 1A4 1Y4 3A4 48 24 2OE 4OE 41 8 30 19 2A1 4A1 2Y1 4Y1 29 40 9 20 2A2 2Y2 4A2 4Y2 38 11 27 22 2A3 4A3 4Y3 2Y3 12 37 26 23 2A4 2Y4 4A4 4Y4 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2016 1 2016 Integrated Device Technology, Inc. DSC-4562/6IDT74ALVCH162244 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +4.6 V (3) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 1 1OE 48 2OE TSTG Storage Temperature 65 to +150 C 2 1Y1 47 1A1 IOUT DC Output Current 50 to +50 mA IIK Continuous Clamp Current, 50 mA 1Y2 3 46 1A2 VI < 0 or VI > VCC GND 4 45 GND IOK Continuous Clamp Current, VO < 0 50 mA 1Y3 5 1A3 44 ICC Continuous Current through each 100 mA ISS VCC or GND 1Y4 6 43 1A4 NOTES: VCC 7 42 VCC 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation 2Y1 8 41 2A1 of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating 2Y2 9 40 2A2 conditions for extended periods may affect reliability. 2. VCC terminals. GND 10 39 GND 3. All terminals except VCC. 11 2Y3 38 2A3 2Y4 12 2A4 37 CAPACITANCE (TA = +25C, F = 1.0MHz) (1) 3Y1 13 36 3A1 Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 5 7 pF 3Y2 14 35 3A2 COUT Output Capacitance VOUT = 0V 7 9 pF GND 34 15 GND CI/O I/O Port Capacitance VIN = 0V 7 9 pF 3Y3 33 16 3A3 NOTE: 1. As applicable to the device type. 3Y4 17 32 3A4 VCC 18 31 VCC 4Y1 19 PIN DESCRIPTION 30 4A1 20 Pin Names Description 4Y2 29 4A2 xOE 3-State Output Enable Inputs (Active LOW) GND 21 28 GND (1) xA x Data Inputs 4Y3 22 27 4A3 x Y x 3-State Outputs 4Y4 23 NOTE: 26 4A4 1. These pins haveBus-Hol. All other pins are standard inputs, outputs, or I/Os. 4OE 24 25 3OE (1) FUNCTION TABLE (EACH 4-BIT BUFFER) TSSOP Inputs Outputs TOP VIEW xOE xAx xYx LH H LL L HX Z NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level Z = High-Impedance 2