9DB836AGILF

9DB836 8-Output 3.3V HCSL PCIe Buffer Datasheet Description Features SPS internal receiver bias network keeps input clock parked The 9DB836 is a zero delay/fanout buffer for PCI Express when input is floating clocking. It supports PCIe Gen13 in zero-delay mode and PCIe Gen14 in fanout mode. The 9DB836 is a pin-compatible upgrade Supports both 85 and 100 output impedance with to the 9DB833 and 9DB834 with a Safe Power Sequence (SPS) appropriate resistor selection clock input. OE pins default to controlling outputs PLL or Bypass mode PLL can dejitter incoming clock Typical Applications Selectable PLL bandwidth minimizes jitter peaking in downstream PLLs Riser cards Spread spectrum compatible Storage Outputs default to Hi-Z when disabled or when device is Networking powered down JBOD SMBus interface unused outputs can be disabled 3 selectable SMBus addresses Output Features Eight 0.7V current-mode differential HCSL output pairs Key Specifications Supports zero delay buffer (ZDB) mode and fanout mode PCIe Gen3 jitter < 0.6ps rms in ZDB mode Selectable bandwidth for zero delay mode PCIe Gen4 additive jitter < 0.1ps rms in fanout mode 50110 MHz operation in PLL mode Output cycle-to-cycle jitter < 50ps 5166 MHz operation in Bypass mode Output-to-output skew < 50ps Block Diagram VDDR VDDA VDD x5 DIF 7 SRC IN SPS DIF 7 SRC IN Spread Compatible PLL 8 outputs SMB ADR tri SMBCLK SMBDAT Control DIF 0 BYP LOBW HIBW Logic DIF 0 PD LOCK OE 0:1,3:4,6,7 8 vOE 2,5 IREF GND x6 GNDA 2020 Renesas Electronics Corporation 1 November 20, 20209DB836 Datasheet Contents Description 1 Typical Applications . 1 Output Features 1 Features 1 Key Specifications 1 Block Diagram . 1 Pin Assignments 3 Pin Descriptions 3 Power Connections . 5 Operating Mode Readback . 5 SMBus Address Selection and Readback . 6 Tri-level Input Logic Levels . 6 Absolute Maximum Ratings . 7 Electrical Characteristics . 8 Test Loads and Terminations . 13 General SMBus Serial Interface Information . 14 How to Write . 14 How to Read . 14 Package Outline Drawings . 17 Marking Diagram 17 Ordering Information . 17 Revision History . 18 2020 Renesas Electronics Corporation 2 November 20, 2020