9DMU0431AKILF

2:4 1.5V PCIe Gen1-2-3 Clock Mux 9D M U 043 1 D A T A S H E E T General Description Features/Benefits The 9DMU0431 is a member of IDT s SOC-Friendly 1.5V LP-HCSL outputs save 8 resistors compared to standard Ultra-Low-Power (ULP) PCIe Gen1-2-3 family. Each of the 4 HCSL outputs outputs has its own dedicated OE pin for optimal system 1.5V operation 31mW typical power consumption control and power management. The part provides Selectable asynchronous or glitch-free switching allows asynchronous and glitch-free switching modes. the mux to be selected at power up even if both inputs are not running, then transition to glitch-free switching mode Recommended Application Spread Spectrum Compatible supports EMI reduction OE pins support DIF power management 2:4 PCIe Gen1-2-3 clock multiplexer HCSL differential inputs can be driven by common clock sources Output Features 1MHz to 167MHz operating frequency 4 Low-Power (LP) HCSL DIF pair Space saving 24-pin 4x4mm VFQFPN minimal board space Key Specifications DIF add iti ve cycle-to-cycle jitter <5ps DIF phase jitter is PCIe Gen1-2-3 compliant Additive phase jitter 125MHz: 535fs rms typical (12kHz to 20MHz) DIF output-to-output skew <50ps Block Diagram , OE(3:0) 4 DIF3 DIF INA A DIF2 DIF1 DIF INB B vSW MODE DIF0 SEL A B 9DMU0431 REVISION A 09/24/14 19DMU0431 DATASHEET Pin Configuration DIF INB Power Management Table Power Connections DIFx OEx Pin DIF IN True O/P Comp. O/P 0 Running Running Running 1 Running Low Low Pin Descriptions 2:4 1.5V PCIE GEN1-2-3 CLOCK MUX 2 REVISION A 09/24/14