USERS MANUAL HIP2103 4MBEVAL1Z AN1896 Rev 0.00 HIP2103, HIP2104 Evaluation Board November 13, 2013 The 6 position DIP switch is used to setup the PWM switching Introduction frequency (positions 1, 2, and 3) and the dead-time (positions The HIP2103 4MBEVAL1Z is an evaluation tool for the 4, 5, and 6). One specific combination of DIP switch settings HIP2103 and HIP2104 half bridge MOSFET drivers. This tool (all positions set to on) disables the signals from the consists of a mother board and HIP2103DBEVAL1Z and microcontroller and enables all of the external inputs. HIP2104DBEVAL1Z evaluation daughter cards. The mother For those customers who would like to modify the firmware of board platform provides an on-board microcontroller that is the PIC18F2431 microcontroller, an RJ25 connector is used to generate appropriate control inputs to the HIP2103 or provided for easy connection with Microchip firmware HIP2104. The frequency, the PWM duty cycle, and the dead-time development tools (not provided or supported by Intersil). provided by the microcontroller are user adjustable. For customers who desire to provide their own external signals, the on-board controller can be configured to allow the daughter cards to be controlled by externally provided inputs. VCC and VDD on/off (HIP2104 only) The daughter cards can also be used as stand-alone units mounted on a customer designed main board that incorporates customer selected bridge FETs and any other external circuits desired. The daughter cards have optional circuits so that the HIP2103 or HIP2104 can be configured as required by the customers application. Specifications Bridge Bias Voltage (V ) 5V minimum, 50V maximum BAT operating including transients uC BIAS External Bias for Microcontroller 3.3V - 5.0V, ~30mA OPTION Maximum Bridge Current 20A BRIDGE EXTERNAL LOAD Vdd, Vcc BIAS BIAS INPUTS PWM Switching Frequency 5kHz to 40kHz in 5kHz increments I/O uC Not used PWM Duty Cycle adjustable from 0% to ~ 98% Dead-time 0.0s to 2.8s in 400ns increments Large Terminal Blocks 15A each connection Small Terminal Blocks 6A each connection Scope This application note covers the use of the HIP2103 4 mother board and the HIP2103 4 daughter cards. Details for setting up and using the microcontroller are covered. Assembly Observe the installation options on the motherboard are also reviewed. Sample polarity waveforms are also provided. The microcontroller firmware is provided on request but the only support offered by Intersil will be for bug corrections. Please refer to Microchip for details on the use of the PIC18F2431. Physical Layout The HIP2103 4MBEVAL1Z board is 84mm by 94mm. The tallest component is the RJ25 connector. The total height is 38mm. Multiple inputs have miniature terminal blocks and the high current battery inputs and load outputs have larger FIGURE 1. HIP2103 4MBEVAL1Z, FRONT AND BACK VIEWS terminal blocks rated for 15A each connection. Three push-buttons are used for RESET, START/STOP, and SLEEP functions. An on-board potentiometer is used to adjust the duty cycle. AN1896 Rev 0.00 Page 1 of 19 November 13, 2013 DUTY CYCLE DEAD FREQ TIMEHIP2103 4MBEVAL1Z application. The jumper strap option, J2, is used to select the Block Diagram appropriate bias source labeled VCC from the HIP2104 or 5V from an external bias connected to 5V and GND on TB8. Optional external The 12V bias for the HIP2103 daughter card must be supplied by LI, HI, VCen, and an external source connected to VDD and GND of TB6. Vden Inputs An external 12V bias is not required for the HIP2104 daughter card because VDD is provided internally by the HIP2104 driver. Push LEDs buttons MicroController and Associated Circuits The PWM frequency and the dead-time options of the External Inputs microcontroller are configured by the SW5 DIP switch. Refer to Microcontroller Buffer the chart on the mother board schematic (page 9) for the DIP switch settings or to Table 1. The DIP switch settings are read only once after the Start/Stop button is pressed to start the PWM. Any changes to the frequency or dead-time settings are Option switches Ext. VCen, Vden, LI, not recognized until the PWM is stopped then re-started. Bias HI, Multiplexer Turning the potentiometer, R1, fully counter clockwise (CCW) reduces the duty cycle of the output of the bridge to a minimum. Jumper Option Turning fully clockwise results with a maximum duty cycle. The duty cycle is proportional to the tap voltage of the potentiometer 3.3V HIP2103 independent of the PWM frequency. The dead-time subtracts or from the duty cycle period on the leading edge of the HI and LI 12V HIP2104 inputs to the daughter cards altering the actual duty cycle. Daughter Card To emulate controllers that may to be used by customers that do not have the ability to generate dead-time, the dead-time of the microcontroller can be set to zero. On the daughter cards, an optional RCD circuit is provided for the LI and HI inputs of the Half Bridge FETs HIP2103, HIP2104 to generate dead-time. Be cautious if the zero dead-time option is selected when the HIP2103, HIP2104 daughter cards are not configured for delays with the RCD circuit as this will result with shoot-thru currents in the bridge. Optional DC Motor or Four LEDs are used to indicate the operating status of the other Loads microcontroller. Refer to the Setup and Operating Instructions section for complete details. FIGURE 2. HIP2103 4MBEVAL1Z, BLOCK DIAGRAM Half Bridge The HIP2103 4 evaluation board is a fully self contained test The bridge is composed of two (SiR662DP) 60A, 60V, MOSFETs. platform to evaluation the HIP2103 or the HIP2104 which are Each FET has an optional gate to source and drain to gate provided on daughter cards. capacitors to allow the emulation of FETs with larger capacitances if desired. An optional series gate resistor is also Evaluation Board Application provided for each bridge FET that can also be used the emulate The HIP2103 4MBEVAL1Z mother board and associated the internal gate resistance. The current rating of these SiR662DP MOSFETs was chosen primarily to eliminate the need daughter cards are the same test boards as used by the Intersil application engineers and I.C. designers to evaluate the of a heat sink when operating with heavy current loads. The performance of the HIP2103 and HIP2104 MOSFET drivers. maximum output load current is constrained by the current rating of the VBAT (TB1) and the Vout (TB7) terminal blocks. If a Bias Supplies load current higher than 15A is desired, it is recommended that the battery and load wires are soldered directly to the solder pads The HIP2103 4MBEVAL1Z mother board requires a current of the TB1 and TB2 terminal blocks on the bottom of the PCB. limited lab supply (0V to 50V) for the VBAT and GND inputs on TB1. The current capacity is dependant on the users desired load The bridge bias source is connected to the GND VBAT terminal if any. block (TB1). The voltage source can be either a current limited power supply (recommended for initial setup) or a battery (a fuse An external 3.3V to 5V bias supply (~25mA) is required for the is highly recommended). microcontroller and associated circuits. Alternatively, the VCC output of the HIP2104 daughter card can be used to provide the An external load can be connected to the GND VOUT (TB7) 3.3V bias for the microcontroller as intended in a real terminal block. The load can be of any configuration (for example AN1896 Rev 0.00 Page 2 of 19 November 13, 2013