Product Information

ISL8702AIBZ

ISL8702AIBZ electronic component of Renesas

Datasheet
Supervisory Circuits ADJ QUAD SEQNCR - 14 NSOIC W/ANNEAL

Manufacturer: Renesas
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 1
Multiples : 1

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ISL8702AIBZ
Renesas

1 : USD 2.7928
25 : USD 2.273
100 : USD 1.9335
1000 : USD 1.4334
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Type
Mounting Style
Package / Case
Threshold Voltage
Number of Inputs Monitored
Output Type
Manual Reset
Watchdog
Watchdog Timers
Battery Backup Switching
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Series
Packaging
Brand
Overvoltage Threshold
Undervoltage Threshold
Operating Supply Current
Factory Pack Quantity :
Supply Voltage - Min
Height
Length
Width
Cnhts
Hts Code
Mxhts
Product Type
Subcategory
Taric
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ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, ISL8705A Data Sheet October 12, 2006 FN6381.0 Adjustable Quad Sequencer Features The ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, Adjustable Delay to Subsequent Enable Signal ISL8705A family of ICs provide four delay adjustable Adjustable Delay to Sequence Auto Start sequenced outputs while monitoring an input voltage all with Adjustable Distributed Voltage Monitoring a minimum of external components. High performance DSP, FPGA, P and various sub-systems Under and Overvoltage Adjustable Delay to Auto Start require input power sequencing for proper functionality at Sequence initial power up and the ISL870XA provides this function I/O Options while monitoring the distributed voltage for over and ENABLE (ISL8700A, ISL8702A, ISL8704A) and undervoltage compliance. ENABLE (ISL8701A, ISL8703A, ISL8705A) SEQ EN (ISL8702A, ISL8703A) and These ICs operate over the +3.3V to +24V nominal voltage SEQ EN (ISL8704A, ISL8705A) range. All have a user adjustable time from UV and OV voltage compliance to sequencing start via an external Voltage Compliance Fault Output capacitor when in auto start mode and adjustable time delay Pb-Free Plus Anneal Available (RoHS Compliant) to subsequent ENABLE output signal via external resistors. Additionally, the ISL8702A, ISL8703A, ISL8704A and Applications ISL8705A provide I/O for sequencing on and off operation Power Supply Sequencing (SEQ EN) and for voltage window compliance reporting System Timing Function (FAULT) over the +3.3V to +24V nominal voltage range. Easily daisy chained for more than 4 sequenced signals. Pinout ISL870XA Altogether, the ISL870XA provides these adjustable features (14 LD SOIC) with a minimum of external BOM. See Figure 1 for typical TOP VIEW implementation. Ordering Information 14 ENABLE D 1 VIN ENABLE C 2 13 TD PART NUMBER PART TEMP. PACKAGE PKG. ENABLE B 3 TC (Note 1) MARKING RANGE (C) (Pb-free) DWG. 12 ENABLE A 4 11 TB ISL8700AIBZ* ISL8700AIBZ -40 to +85 14 Ld SOIC M14.15 OV TIME 5 10 ISL8701AIBZ* ISL8701AIBZ -40 to +85 14 Ld SOIC M14.15 UV 6 SEQ EN (NC on ISL8700A/01A) 9 ISL8702AIBZ* ISL8702AIBZ -40 to +85 14 Ld SOIC M14.15 GND FAULT (NC on ISL8700A/01A) 7 8 ISL8703AIBZ* ISL8703AIBZ -40 to +85 14 Ld SOIC M14.15 ISL8701A, ISL8703A, ISL8705A PINS 1-4 ARE ENABLE FUNCTION ISL8704AIBZ* ISL8704AIBZ -40 to +85 14 Ld SOIC M14.15 ISL8704A, ISL8705A PIN 9 IS SEQ EN FUNCTION ISL8705AIBZ* ISL8705AIBZ -40 to +85 14 Ld SOIC M14.15 ISL870XAEVAL1 Evaluation Platform 3.3-24V *Add -T suffix for tape and reel. EN NOTES: Vo1 DC/DC VIN Ru ENABLE A 1. Intersil Pb-free plus anneal products employ special Pb-free material SEQ EN * ENABLE B sets molding compounds/die attach materials and 100% matte tin ENABLE C EN plate termination finish, which are RoHS compliant and compatible UV Vo2 ENABLE D DC/DC with both SnPb and Pb-free soldering operations. Intersil Pb-free Rm products are MSL classified at Pb-free peak reflow temperatures that OV FAULT * meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. EN Vo3 GND TB TC TD TIME DC/DC Rl EN V04 DC/DC * SEQ EN and FAULT are not available on ISL8700A and ISL8701A FIGURE 1. ISL870XA IMPLEMENTATION CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, ISL8705A Absolute Maximum Ratings Thermal Information V , ENABLE( ), FAULT . 27V, to -0.3V Thermal Resistance (Typical, Note 2) (C/W) IN JA TIME, TB, TC, TD, UV, OV . +6V, to -0.3V 14 Ld SOIC . 110 SEQ EN( ) . V +0.3V, to -0.3V IN Maximum Junction Temperature (Plastic Package) . +125C ENABLE, ENABLE Output Current . 10mA Maximum Storage Temperature Range -65C to +150C Maximum Lead Temperature (Soldering 10s) +300C Operating Conditions (SOIC Lead Tips Only) Temperature Range -40C to +85C Supply Voltage Range (Nominal) 3.3V to 24V CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 2. is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. JA Electrical Specifications Nominal V = 3.3V to +24V, T = T = -40C to+85C, Unless Otherwise Specified. IN A J PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT UV AND OV INPUTS UV/OV Rising Threshold V 1.16 1.21 1.28 V UVRvth UV/OV Falling Threshold V 1.06 1.10 1.18 V UVFvth UV/OV Hysteresis V V - V -104 - mV UVhys UVRvth UVFvth UV/OV Input Current I -10 - nA UV TIME, ENABLE/ENABLE OUTPUTS TIME Pin Charging Current I -2.6 - A TIME TIME Pin Threshold V 1.9 2.0 2.25 V TIME VTH Time from V Valid to ENABLE A t SEQ EN = high, C = open - 30 - s IN VINSEQpd TIME t SEQ EN = high, C = 10nF - 7.7 - ms VINSEQpd 10 TIME t SEQ EN = high, C = 500nF - 435 - ms VINSEQpd500 TIME Time from V Invalid to Shutdown t UV or OV to simultaneous shutdown - - 1 s IN shutdown ENABLE Output Resistance R I = 1mA - 100 - EN ENABLE ENABLE Output Low Vol I = 1mA - 0.1 - V ENABLE ENABLE Pull-down Current I ENABLE = 1V 10 15 - mA pulld Delay to Subsequent ENABLE Turn-on/off t R = 120k 155 195 240 ms del 120 TX t R = 3k 3.5 4.7 6 ms del 3 TX t R = 0 -0.5 - ms del 0 TX SEQUENCE ENABLE AND FAULT I/O V Valid to FAULT Low t 15 30 50 s IN FLTL V Invalid to FAULT High t -0.5 - s IN FLTH FAULT Pull-down Current FAULT = 1V 10 15 - mA SEQ EN Pull-up Voltage V SEQ EN open - 2.4 - V SEQ SEQ EN Low Threshold Voltage Vil -- 0.3 V SEQ EN SEQ EN High Threshold Voltage Vih 1.2 - - V SEQ EN Delay to ENABLE A Deasserted t SEQ EN low to ENABLE A low - 0.2 1 s SEQ EN ENA BIAS IC Supply Current I V = 3.3V - 191 - A VIN 3.3V IN I V = 12V - 246 400 A VIN 12V IN I V = 24V - 286 - A VIN 24V IN V Power On Reset V V low to high - 2.3 2.8 V IN IN POR IN FN6381.0 2 October 12, 2006

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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