Datasheet
RL78/L12 R01DS0157EJ0211
Rev.2.11
RENESAS MCU
Feb 14, 2020
True low-power platform (62.5 A/MHz, and 0.64 A for operation with only RTC and LVD) for the LCD-based applications, with the on-chip
LCD controller and driver, 8- to 32-Kbyte code flash memory, 1.6-V to 5.5-V operation, and 31 DMIPS at 24 MHz
1. OUTLINE
1.1 Features
Ultra-Low Power Technology LCD Controller/Driver
1.6 V to 5.5 V operation from a single supply Up to 35 seg x 8 com or 39 seg x 4 com
Stop (RAM retained): 0.23 A, (LVD enabled): 0.31 A Supports capacitor split method, internal voltage boost
method and resistance division method
Halt (RTC + LVD): 0.64 A
Supports waveform types A and B
Supports snooze
Supports LCD contrast adjustment (16 steps)
Operating: 62.5 A/MHz
Supports LCD blinking
LCD operating current (Capacitor split method): 0.12 A
LCD operating current (Internal voltage boost method):
0.63 A (VDD = 3.0 V) Direct Memory Access (DMA) Controller
Up to 2 fully programmable channels
Transfer unit: 8- or 16-bit
16-bit RL78 CPU Core
Delivers 31 DMIPS at maximum operating frequency of
Multiple Communication Interfaces
2
24 MHz
Up to 1 I C multi-master
Instruction Execution: 86% of instructions can be
Up to 2 CSI/SPI (7-, 8-bit)
executed in 1 to 2 clock cycles
Up to 1 UART (7-, 8-, 9-bit)
CISC Architecture (Harvard) with 3-stage pipeline
Up to 1 LIN
Multiply Signed & Unsigned: 16 x 16 to 32-bit result in 1
clock cycle Extended-Function Timers
MAC: 16 x 16 to 32-bit result in 2 clock cycles Multi-function 16-bit timers: Up to 8 channels
16-bit barrel shifter for shift & rotate in 1 clock cycle Real-time clock (RTC): 1 channel (full calendar and
1-wire on-chip debug function alarm function with watch correction function)
Interval Timer: 12-bit, 1 channel
15 kHz watchdog timer: 1 channel (window function)
Code Flash Memory
Density: 8 KB to 32 KB
Rich Analog
Block size: 1 KB
ADC: Up to 10 channels, 10-bit resolution, 2.1 s
On-chip single voltage flash memory with protection
conversion time
from block erase/writing
Supports 1.6 V
Self-programming with flash shield window function
Internal reference voltage (1.45 V)
On-chip temperature sensor
Data Flash Memory
Data flash with background operation
Safety Features (IEC or UL 60730 compliance)
Data flash size: 2 KB size
Flash memory CRC calculation
Erase cycles: 1 Million (typ.)
RAM parity error check
Erase/programming voltage: 1.8 V to 5.5 V
RAM write protection
SFR write protection
RAM
Illegal memory access detection
1 KB and 1.5 KB size options
Clock frequency detection
Supports operands or instructions
ADC self-test
Back-up retention in all modes
General Purpose I/O
High-speed On-chip Oscillator
5V tolerant, high-current (up to 20 mA per pin)
24 MHz with +/ 1% accuracy over voltage (1.8 V to 5.5
Open-Drain, Internal Pull-up support
V) and temperature ( 20C to 85C)
Pre-configured settings: 24 MHz, 16 MHz, 12 MHz, 8
Operating Ambient Temperature
MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz & 1 MHz
TA: 40 C to +85 C (A: Consumer applications)
TA: 40 C to +105 C (G: Industrial applications)
Reset and Supply Management
Power-on reset (POR) monitor/generator Package Type and Pin Count
From 7mm x 7mm to 12mm x 12mm
Low voltage detection (LVD) with 14 setting options
QFP: 32, 44, 48, 52, 64
(Interrupt and/or reset function)
R01DS0157EJ0211 Rev.2.11 Page 1 of 135
Feb 14, 2020
RL78/L12 1. OUTLINE
ROM, RAM capacities
Flash ROM Data flash RAM RL78/L12
32 pins 44 pins 48 pins 52 pins 64 pins
Note
1.5 KB
32 KB 2 KB R5F10RBC R5F10RFC R5F10RGC R5F10RJC R5F10RLC
Note
16 KB 2 KB 1 KB R5F10RBA R5F10RFA R5F10RGA R5F10RJA R5F10RLA
Note
1 KB
8KB 2 KB R5F10RB8 R5F10RF8 R5F10RG8 R5F10RJ8
Note In the case of the 1 KB, and 1.5 KB, this is 630 bytes when the self-programming function and data flash
function is used.
Remark The functions mounted depend on the product. See 1.6 Outline of Functions.
R01DS0157EJ0211 Rev.2.11 Page 2 of 135
Feb 14, 2020