PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT PD70F3778,70F3779,70F3780,70F3781,70F3782, 70F3783,70F3784,70F3785,70F3786 V850ES/JH3-E, V850ES/JJ3-E 32-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION The PD70F3778, 70F3779, 70F3780, 70F3781, 70F3782, 70F3783 (V850ES/JH3-E), and PD70F3784, 70F3785, 70F3786 (V850ES/JJ3-E) are products of the V850 32-bit single-chip microcontrollers, and include peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an A/D converter, a DMA controller , a CAN controller , a USB function controller , and a Ethernet controller. In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/JH3-E, and V850ES/JJ3-E include instructions executed via a hardware multiplier, saturation instructions, and bit manipulation instructions. Detailed function descriptions are provided in the following users manuals. Be sure to read them before designing. V850ES/JH3-E, V850ES/JJ3-E Hardware Users Manual: To be prepared V850ES Architecture Users Manual: U15943E FEATURES Number of instructions: 83 Timer/counters Minimum instruction execution time: 16-bit timer/event counter AA (TAA): 6 channels 20 ns ( 50 MHz operation with main clock (fXX)) 16-bit timer/event counter AB (TAB): 2 channels Clock Motor control function supported Main clock oscillation: fX = 3 to 6.25 MHz 16-bit interval timer M (TMM): 4 channels Subclock oscillation: fXT = 32.768 kHz 16-bit encoder timer T (TMT): 1 channel Internal oscillation: fR = 220 kHz (TYP.) Real-time counter: 1 channel General-purpose registers: 32 bits 32 registers Watchdog timer: 1 channel Instruction set: Real-time output function: 6 channels Signed multiplication, saturation operations, 32-bit shift A/D converter: 10-bit resolution 10/12 channels instructions, bit manipulation instructions, load/store Serial interface instructions Ethernet controller: 1 channel Memory space: USB function controller: 1 channel 64 MB linear address space CAN :1 channel (PD70F3783, 70F3786 only) External bus interface: Asynchronous serial interface B with FIFO: 2 channels Multiplexed bus mode Asynchronous serial interface C(UARTC): 6/8 channels Separate bus mode Clocked serial interface E(CSIE) with FIFO: 2 channels Internal memory Clocked serial interface F(CSIF): 5/6 channels 2 Flash memory: 256/384/512 KB I C bus interface: 4/5 channels RAM: 76/124 KB DMA controller: 4 channels (Including 16/64 KB of data RAM area) Power save function: I/O lines Total: 84/100 HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode Interrupts and exceptions On-chip debug function Non-maskable interrupts: 2 sources Package: 128-pin LQFP (V850ES/JH3-E) Maskable interrupts: 99/103/109/113 sources 144-pin LQFP (V850ES/JJ3-E) Operating supply voltage: 2.85 to 3.6 V The information contained in this document is being issued in advance of the production cycle for the product. The parameters for the product may change before final production or NEC Electronics Corporation, at its own discretion, may withdraw the product prior to its production. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. U19495EJ1V0PM00 (1st edition) Date Published December 2008 NS 2008 Printed in Japan PD70F3778, 70F3779, 70F3780, 70F3781, 70F3782, 70F3783, 70F3784, 70F3785, 70F3786 Function list (V850ES/JH3-E) Generic Name V850ES/JH3-E Product Name PD70F3778 PD70F3779 PD70F3780 PD70F3781 PD70F3782 PD70F3783 Internal Flash memory 256 KB 384 KB 512 KB 384 KB 512 KB 512 KB memory Internal RAM 60 KB 60 KB 60 KB 60 KB 60 KB 60 KB Data RAM 16 KB 16 KB 16 KB 64 KB 64 KB 64 KB Memory Logical space 64 MB space External memory area 4 MB External bus interface Address buses: 22, Address/data buses: 16 Separate bus/Multiplexed bus mode supported General-purpose register 32 bits 32 registers Clocks Main clock oscillation PLL mode : fX = 3 to 6.25 MHz, fXX = 24 to 50 MHz (multiplication by 8) Clock through mode : fX = 3 to 6.25 MHz ( internal : fXX = 3 to 6.25 MHz) Subclock oscillation fXT = 32.768 kHz Internal oscillation fR = 220 kHz (TYP.) Minimum instruction 20 ns ( 50 MHz operation with main system clock (fXX)) execution time I/O ports I/O: 84 (5 V tolerant : 48) Timer 16-bit TAA 6 channels (among which one channel has the interval function only) 16-bit TAB 2 channels 16-bit TMM 4 channels 16-bit TMT 1 channel Motor control 1 channel (functions when used in combination with TAA and TAB. Hi-Z output control function available) Watch timer 1 channel (RTC) WDT 1 channel Real-time output function 6 bits 1 channel 10-bit A/D converter 10 channels Serial CSIF/UARTC 1 channel 2 interface CSIF/UARTC/IC 2 channels CSIE/UARTC 1 channel Note 1 2 CSIE /UARTC/I C 1 channel CSIF/UARTB 2 channels (one of these channels is allocated to two pins) Note 1 CSIE 1 channel 2 UARTC/I C 1 channel 2 UARTC/I C/CAN 1 channel USB function 1 channel Ethernet 1 channel DMA controller 4 channels (transfer target: on-chip peripheral I/O, internal RAM, external memory) Note 2, 3 Interrupt External 22 (22) 22 (22) 22 (22) 22 (22) 22 (22) 22 (22) source Internal 79 79 79 79 79 83 Power-save function HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE modes Reset factor RESET pin input, watchdog timer 2 (WDT2), clock monitor (CLM), low-voltage detector (LVI) On-chip debugging MINICUBE , MINICUBE2 supported Operating supply voltage 2.85 to 3.6 V Operating ambient temperature 40 to +85C Package 128-pin plastic LQFP (fine pitch) (14 20 mm) Notes 1. The same channel is allocated to two pins. Notes 2. The figure in parentheses indicates the number of external interrupts that can release the STOP mode. Notes 3. Include NMI. 2 Preliminary Product Information U19495EJ1V0PM