DATASHEET Dual Supply/Low Power/1024-Tap/SPI Bus, Single Digitally-Controlled (XDCP) Potentiometer X9110 Features The X9110 integrates a Single Digitally Controlled 1024 resistor taps 10-bit resolution Potentiometer (XDCP) on a monolithic CMOS integrated circuit. SPI serial interface for write, read, and transfer operations of the potentiometer The digital controlled potentiometer is implemented using 1023 resistive elements in a series array. Between each Wiper resistance, 40 typical at 5V element are tap points connected to the wiper terminal Four nonvolatile data registers through switches. The position of the wiper on the array is Nonvolatile storage of multiple wiper positions controlled by the user through the SPI bus interface. The potentiometer has associated with it a volatile Wiper Counter Power-on recall, loads saved wiper position on power-up Register (WCR) and four nonvolatile data registers that can be Standby current <5A maximum directly written to, and read by, the user. The contents of the WCR controls the position of the wiper on the resistor array System V : 2.7V to 5.5V operation CC though the switches. Power-up recalls the contents of the Analog V+/V-: -5V to +5V default data register (DR0) to the WCR. 100k end-to-end resistance The XDCP can be used as a three-terminal potentiometer or as 100 year data retention a two terminal variable resistor in a wide variety of Endurance: 100,000 data changes per bit per register applications including control, parameter adjustments, and signal processing. 14 Ld TSSOP Dual supply version of the X9111 Related Literature Low power CMOS For a full list of related documents, visit our website Pb-free (RoHS compliant) - X9110 product page V R V+ CC H ADDRESS WRITE POWER-ON RECALL 100k DATA READ STATUS TRANSFER 1024-TAPS BUS WIPER COUNTER SPI POT INTERFACE REGISTER (WCR) BUS AND WIPER INTERFACE CONTROL DATA REGISTERS (DR0-DR3) CONTROL V NC NC R R V- SS W L FIGURE 1. FUNCTIONAL DIAGRAM October 28, 2016 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2005, 2008, 2016. All Rights Reserved FN8158.5 Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.X9110 System Level Applications Applications Adjust the contrast in LCD displays Circuit Level Applications Control the power level of LED transmitters in communication Vary the gain of a voltage amplifier systems Provide programmable DC reference voltages for comparators Set and regulate the DC biasing point in an RF power amplifier and detectors in wireless systems Control the volume in audio circuits Control the gain in audio and home entertainment systems Trim out the offset voltage error in a voltage amplifier circuit Provide the variable DC bias for tuners in RF wireless systems Set the output voltage of a voltage regulator Set the operating points in temperature control systems Trim the resistance in Wheatstone bridge circuits Control the operating point for sensors in industrial systems Control the gain, characteristic frequency and Q-factor in filter Trim offset and gain errors in artificial intelligent systems circuits Set the scale factor and zero point in sensor signal conditioning circuits Vary the frequency and duty cycle of timer ICs Vary the DC biasing of a pin diode attenuator in RF circuits Provide a control variable (I, V, or R) in feedback circuits Ordering Information PART NUMBER PART V LIMITS POTENTIOMETER TEMP RANGE PACKAGE CC (Notes 2, 3) MARKING (V) RANGE (k ) (C) (RoHS COMPLIANT) PKG. DWG. X9110TV14Z (Note 1) X9110 TVZ 5 10 100 0 to +70 14 Ld TSSOP M14.173 X9110TV14IZ X9110 TVZI -40 to +85 14 Ld TSSOP M14.173 X9110TV14Z-2.7 X9110 TVZF 2.7 to 5.5 0 to +70 14 Ld TSSOP M14.173 X9110TV14IZ-2.7 (Note 1) X9110 TVZG -40 to +85 14 Ld TSSOP M14.173 NOTES: 1. Add T1 suffix for 2.5k unit tape and reel option. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), see product information page for X9110. For more information on MSL, see tech brief TB363. Submit Document Feedback FN8158.5 2 October 28, 2016