Datasheet Simple design with built-in self-controlled cell balance features circuit Cell Balance LSI of 4 to 6 Series Power Storage Element Cells for Automotive BD14000EFV-C General Description Key Specifications BD14000EFV is a LSI IC designed as a self-controlled Input Voltage Range8.0V to 24.0V cell balancer. It has a built-in shunt-type power storage Cell Voltage Detection Range2.4V to 3.1V element balancer function that can respond to 4 to 6 Cell Voltage Detection Accuracy1(Max. at cells. All the functions necessary in a cell balancer are 25C) built-in making power storage element cell balancing Shunt Switch ON Resistance1(Typ.) possible only in this LSI. Operating Temp. Range -40C to +105C This chip can be used for electric double layer Package W (Typ) x D (Typ) x H (Max) capacitors (EDLC) with cell detection voltage range of HTSSOP-B30 10.00mm x 7.60mm x 1.00mm 2.4V to 3.1V and power storage capacitors which is important for cell balancers with similar electrical characteristics It has a built-in multiple over-voltage detection function and can also detect abnormal mode such as any characteristic deterioration in cells. Also, application-dependent operation can be set since enable control is possible. HTSSOP-B30 Features (Note1) AEC-Q100 qualified All EDLC cell balancer functions are integrated on a single chip Typical Application Circuit Self- controlled EDLC balance function Adopts shunt resistance method for simple balancing 4 to 6 cell series connection ready Multiple chip series connection is possible Built-in over-voltage detection flag output Detection voltage can be set (Note1 : Grade2) Applications Renewable energy power storage for Automotive, Production machinery, Building machinery, etc. UPS and other devices that stabilizes power supplies Figure 1 Typical application circuit Product structure : Silicon monolithic integrated circuit This product has no designed protection against radioactive rays .w ww.rohm.com TSZ02201-0Q3Q0JZ00270-1-2 2015 ROHM Co., Ltd. All rights reserved. 1/18 TSZ22111 14 001 22.Jun.2015 Rev.002BD14000EFV-C Datasheet Pin Configuration T TT T T T Figure 2 Pin Configuration Pin Description PIN No. Symbol Function PIN No. Symbol Function Positive (+) connection terminal Positive (+) connection terminal pin of 1 C6 pin of cell 6 16 C1 cell 1 Shunt switch connection terminal Shunt switch connection terminal pin for 2 D6 17 D1 pin for cell 6. cell 1 Shunt switch connection terminal Shunt switch connection terminal pin for 3 S6 18 S1 pin for cell 6. cell 1 Positive (+) connection terminal Analog ground (connect to (-) side of 4 C5 19 VSS pin of cell 5 bottom cell) Shunt switch connection terminal 5 D5 20 VSET2 Detection voltage setting input pin 2 pin for cell 5. Shunt switch connection terminal 6 S5 21 VSET1 Detection voltage setting input pin 1 pin for cell 5. Positive (+) connection terminal 7 C4 22 VSET0 Detection voltage setting input pin 0 pin of cell 4. Shunt switch connection terminal 8 D4 23 OVLOSEL Over-voltage detection setting input pin pin for cell 4. Shunt switch connection terminal 9 S4 24 TEST0 TEST terminal pin (connect to VSS) pin for cell 4. Positive (+) connection terminal 10 C3 25 ENIN Enable signal input pin pin of cell 3. Shunt switch connection terminal 11 D3 26 VO OK Self-Check OK signal output pin pin for cell 3. Shunt switch connection terminal 12 S3 27 VO OVLO2 Overvoltage flag output pin 2 pin for cell 3. Positive (+) connection terminal 13 C2 28 VO OVLO1 Overvoltage flag output pin 1 pin of cell 2 Shunt switch connection terminal Regulator circuit output pin 14 D2 29 VREG pin for cell 2. (output capacitor : 1.0F) Shunt switch connection terminal 15 S2 30 VCC Regulator circuit power input pin pin for cell 2. The back PAD is used for enhancing the radiation of heat. This PAD is needed to connect VSS. TEST0 : This pin is used for ROHM internal test. This pin is needed to connect VSS for normal operation. www.rohm.com TSZ02201-0Q3Q0JZ00270-1-2 2015 ROHM Co., Ltd. All rights reserved. 2/18 TSZ22111 15 001 22.Jun.2015 Rev.002