TECHNICAL NOTE LCD Segment Driver series For 72/80/96 Segment type LCD LCD Segment Driver BU9735K, BU9796FS, BU9716BKV, BU9718KV Outline This is LCD segment driver for 72-96 segment type display. There is a lineup which is suitable for multi function display and is integrated display RAM and power supply circuit for LCD driving with 4 common output type: BU9735K and BU9796FS. And 3 common output type: BU9716BKV and BU9718KV. 72Segment (18SEG4COM) Driver BU9735K P.1 80Segment (20SEG4COM) Driver BU9796FS P.9 96Segment (32SEG3COM) Driver BU9716BKV/BU9718KV P.19 BU9735K 72Segment (18SEG4COM) Driver Feature 1) 4wire serial interface (SCK, SD, C / D, CS) 2) Integrated RAM for display data (DDRAM) 18 4bit (Max 72 Segment) 3) LCD driving port 4 Common output, 18 Segment output 4) Display duty 1/4 duty 5) Integrated Oscillator circuit (external resister type) 6) Integrated Power supply circuit for LCD driving (1/3 bias) 7) Low power/ Ultra low power consumption design +2.55.5V Uses DVC, Car audio, Telephone Absolute Maximum Ratings Ta=25degree, VSS=0V (BU9735K) Parameter Symbol Limits Unit Remarks Power Supply Voltage1 VDD -0.3 +7.0 V Power supply Power Supply Voltage2 VLCD -0.3 +7.0 V LCD drive voltage When use more than Ta=25 C, subtract Allowable loss Pd 400 mW 4mW per degree. Operational temperature range Topr -40 +85 Degree Storage temperature range Tstg -55 +125 Degree Input voltage range VIN -0.3 to VDD*0.3 V Output voltage range VOUT -0.3 to VDD+0.3 V *This product is not designed against radioactive ray. Recommend operating conditions (Ta=25degree, VSS=0V) (BU9735K) Parameter Symbol MIN TYP MAX Unit Remarks Power Supply Voltage1 VDD 2.2 - 5.5 V Power Supply Voltage2 VLCD 2.5 - 5.5 V VLCDVCVSS Oscillator frequency fOSC - 36 - KHz Rf=470k This document is not delivery specifications. Jun. 2008 Electrical Characteristics (BU9735K) DC Characteristics (VDD=2.55.5V, VSS=0V, Ta=25degree, unless otherwise specified) Limit Symb Parameter Unit Condition Terminal ol Min. Typ. Max. SC1, SD, SCK, VIH1 0.8VDD - VDD H level input voltage V C / D, CS L level input voltage VIL1 0 - 0.2VDD SEG118, COM14 LCD Driver on resistance RON - - 30 K VON =0.1V OSC1, SD, SCK, H level input current IIH -2 - - uAVIN=VDD C / D, CS, L level input current IIL - - 2 uAVIN=0 Input capacitance CI - 5 - pF SD, SCK, C / D, CS *2 - 0.05 1 uA Display OFF *2 Power consumption IDD - 30 70 uA Display ON VDD *3 - 80 200 uA MPU Access *1: LCD Driver on resistance is not included internal power supply impedance. *2: VLCD=VDD, Rf=470Kohm, except of OSC1 terminals are connected to VDD or VSS. *3: VLCD=VDD, Rf=470Kohm, fSCK=200KHz AC Characteristics (VDD=2.55.5V, VSS=0V, Ta=25degree, unless otherwise specified) Limit Parameter Symbol Unit Condition Min. Typ. Max. SCK rise time tTLH - - 100 ns SCK fall time tTHL - - 100 ns SCK cycle time tCYC 800 - - ns Wait time for command tWAIT 800 - - ns SCK pulse width H tWH1 300 - - ns SCK pulse width L tWL1 300 - - ns SD setup time tSU1 100 - - ns SD hole time tH1 100 - - ns CS pulse width H tWH2 300 - - ns CS pulse width L tWL2 6400 - - ns CS setup time tSU2 100 - - ns CS hold time tH2 100 - - ns C / D setup time tSU3 100 - - ns th C / D hold time tH3 100 - - ns Based on SCK 8 clock rising *4 C / D - CS time tCCH 100 - - ns Based on CS rising *4 th C / D - SCK time tSCH 100 - - ns Based o SCK 8 clock falling th Display start delay time tON 140 - - ns SCK 8 clock rising to display start *4: should satisfy either one condition tWH2 tWL2 CS tSU2 tTH2 tCYC tWH1 tCYC tWAIT SCK SCK tWL1 tTLH tTHL SD D7 D6 D0 D7 tSU1 tH1 SD tCCH tSCH tSU3 tTH3 C/D Fig. BU9735K-1 Interface timing Fig. BU9735K-2 Command cycle 2/25