GS2985
GS2985 Multi-Rate SDI Reclocker with Equalization & De-emphasis
Features Description
SMPTE 424M, SMPTE 292M and SMPTE 259M-C compliant The GS2985 is a multi-rate serial digital reclocker designed to
automatically recover the embedded clock from a digital video
Supports DVB-ASI at 270Mb/s
signal and retime the incoming video data. It will recover the
Single supply operation at 3.3V or 2.5V
embedded clock signal and retime the data from a SMPTE 424M,
180mW typical power consumption (210mW with RCO
SMPTE 292M, or SMPTE 259M-C compliant digital video signal.
enabled) at 2.5V
A serial host interface provides the ability to configure and
Input signal equalization and output-signal de-emphasis
monitor multiple GS2985 devices in a daisy-chain configuration.
settings to compensate for board-trace dielectric losses
Adjustable input trace equalization (EQ) for up to 40 of FR4 trace
4:1 input multiplexer patented technology
losses, and adjustable output de-emphasis (DE) for up to 20 of
Choice of dual reclocked data outputs or one reclocked data
FR4 trace losses, can be configured via the host interface.
output and one clock output
The GS2985 can operate in either auto or manual rate selection
Uses standard 27MHz crystal
mode. In Auto mode, the device will automatically detect and lock
Cascadable crystal buffer supports multiple reclockers using
onto incoming SMPTE SDI data signals at any supported rate. For
a single crystal
single rate data systems, the GS2985 can be configured to operate
Differential inputs and outputs
in Manual mode. In both modes, the device requires only one
support DC coupling to industry-standard differential
external crystal to set the VCO frequency when not locked and
logic
provides adjustment free operation.
on-chip 100 differential data input/output termination
The GS2985 accepts industry-standard differential input levels
selectable 400mVppd or 800mVppd output swing on
including LVPECL and CML. The differential data and clock
each output
outputs feature selectable output swing via the host interface,
seamless interface to other Gennum products
ensuring compatibility with most industry-standard, terminated
differential receivers.
4 wire SPI host interface for device configuration and
monitoring
The GS2985 features dual differential outputs. The second output
Standard logic control and status signal levels
can be configured to emit either the recovered clock signal or the
re-timed video data. This output can also be disabled to save
Auto and Manual modes for rate selection
power.
Standards indication in Auto mode
In systems which require passing of non-SMPTE data rates, the
Lock Detect Output
GS2985 can be configured to either automatically or manually
Mute, Bypass and Autobypass functions
enter a bypass mode in order to pass the signal without reclocking.
SD/HD indication output to control GS2978 or GS2988 dual
The GS2985 is Pb-free, and the encapsulation compound does not
slew-rate cable drivers
contain halogenated flame retardant. This component and all
Operating temperature range: -40C to +85C
homogeneous sub-components are RoHS compliant.
Small footprint QFN package (9mm x 9mm)
Package-compatible with GS2975A
Pb-free and RoHS compliant
Applications
SMPTE 424M, SMPTE 292M and SMPTE 259M-C coaxial
cable serial digital interfaces
GS2985 Multi-Rate SDI Reclocker with Equalization & 1 of 45
www.semtech.com
De-emphasis
Data Sheet Proprietary & Confidential
36663 - 5 July 2012XTAL- CP_CAP
XTAL_BUF_OUT
XTAL+
LF+ KBB
XTAL
Buffer LDO
DDO0
OSC
Data
DE0_EN
Buffer
Retimer
DDO0
Phase
DDI0
Frequency
Detector
DDI0
DDO1/RCO
Charge
Clock/
VCO
Pump
Data
DE1_EN
DDI1 Buffer
DDO1/RCO
DDI1
Equalizer/
Data Mux
Phase
DDI2
Detector
DDI2
Selectable
DDI3
Divide
DDI3
Selectable
Divide
1.8V
LOS
SPI
Control LDO
Detect
DDI_SEL[1:0] LOS AUTO/MAN LOCKED BYPASS
SS[1:0] DATA/CLOCK
DDO1_DISABLE
VDD_1p8
SD/HD DATA_MUTE
AUTOBYPASS
GS2985 Functional Block Diagram
Revision History
Version ECR PCN Date Changes and/or Modifications
Removed jumper from Figure 5-1:
5 158296 July 2012
GS2985 Typical Application Circuit.
Corrected 4.15.3 section to make it
4 158127 May 2012 easier to follow and changed to
Semtech Template.
Corrected DRIVER_1 [7:5] Function
3 158063 May 2012 Description in Table 4-12: Host Register
Map
Converted to Data Sheet. Updated
Power numbers in Table 2-1: DC
2 153705 March 2010
Electrical Characteristics. Added Table
4-5: Suggested LOS Threshold Settings.
September Updates to Section 4.15 Host Interface.
1 152592
2009
Converted document to Preliminary
0 152329 July 2009
Data Sheet.
Added Figure 4-2: De-emphasis
D 152240 July 2009
Waveform.
Removed Proprietary & Confidential
C 152042 June 2009
from document.
GS2985 Multi-Rate SDI Reclocker with Equalization & 2 of 45
De-emphasis
Data Sheet Proprietary & Confidential
36663 - 5 July 2012
HIF
SDI/EQ0_EN
SDO/EQ1_EN
SCK/EQ2_EN
CS/EQ3_EN