C8051F120-GQ

C8051F120/1/2/3/4/5/6/7 8K ISP FLASH MCU Family Analog Peripherals High Speed 8051 C Core - 10 or 12-bit SAR ADC - Pipelined instruction architecture executes 70% of 1 LSB INL instruction set in 1 or 2 system clocks Programmable throughput up to 100 ksps - 100 MIPS or 50 MIPS throughput with on-chip PLL Up to 8 external inputs programmable as single- ended or differential - 2-cycle 16 x 16 MAC engine (C8051F120/1/2/3 and Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5 C8051F130/1/2/3 only) Data-dependent windowed interrupt generator Memory Built-in temperature sensor - 8-bit SAR ADC (F12x Only) - 8448 bytes internal data RAM (8 k + 256) Programmable throughput up to 500 ksps - 128 or 64 kB Banked Flash in-system programma- 8 external inputs (single-ended or differential) ble in 1024-byte sectors Programmable amplifier gain: 4, 2, 1, 0.5 - Two 12-bit DACs (F12x Only) - External 64 kB data memory interface (programma- Can synchronize outputs to timers for jitter-free wave- ble multiplexed or non-multiplexed modes) form generation Digital Peripherals - Two Analog Comparators - 8 byte-wide port I/O (100TQFP) 5 V tolerant - Voltage Reference - V Monitor/Brown-Out Detector - 4 Byte-wide port I/O (64TQFP) 5 V tolerant DD On-Chip JTAG Debug & Boundary Scan - Hardware SMBus (I2C Compatible), SPI, and - On-chip debug circuitry facilitates full-speed, non- two UART serial ports available concurrently intrusive in-circuit/in-system debugging - Programmable 16-bit counter/timer array with - Provides breakpoints, single-stepping, watchpoints, 6 capture/compare modules stack monitor inspect/modify memory and registers - 5 general purpose 16-bit counter/timers - Superior performance to emulation systems using - Dedicated watchdog timer bi-directional reset pin ICE-chips, target pods, and sockets Clock Sources - IEEE1149.1 compliant boundary scan - Internal precision oscillator: 24.5 MHz - Complete development kit - Flexible PLL technology 100-Pin TQFP or 64-Pin TQFP Packaging - External Oscillator: Crystal, RC, C, or clock - Temperature Range: 40 to +85 C Voltage Supples - RoHS Available - Range: 2.73.6 V (50 MIPS) 3.03.6 V (100 MIPS) - Power saving sleep and shutdown modes ANALOG PERIPHERALS DIGITAL I/O UART0 VREF Port 0 10/12-bit UART1 Port 1 PGA 100ksps SMBus ADC Port 2 SPI Bus + + PCA Port 3 TEMP - - Timer 0 SENSOR VOLTAGE Timer 1 Port 4 COMPARATORS Timer 2 Port 5 12-Bit Timer 3 8-bit DAC Port 6 PGA Timer 4 500ksps ADC 12-Bit Port 7 DAC C8051F12x Only 64 pin 100 pin HIGH-SPEED CONTROLLER CORE 8051 CPU 128/64 kB 8448 B 16 x 16 MAC (50 or 100MIPS) ISP FLASH SRAM ( F120/1/2/3, F13x) 20 DEBUG CLOCK / PLL JTAG INTERRUPTS CIRCUITRY CIRCUIT Rev. 1.4 12/03 Copyright 2003 by Silicon Laboratories C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 AMUX AMUX CROSSBAR External Memory InterfaceC8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 NOTES: 2 Rev. 1.4