SiT9201 Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Features Applications Any frequency between 1 MHz and 110 MHz accurate to 6 decimal Industrial, medical, automotive, avionics and other high temper- places ature applications Operating temperature from -40C to 85C. Refer to SiT2018 for Industrial sensors, PLC, motor servo, outdoor networking -40C to 85C option and SiT2020 for -55C to 125C option equipment, medical video cam, asset tracking systems, etc. Excellent total frequency stability as low as 20 ppm Low power consumption of 3.6 mA typical Fast startup time of 5 ms LVCMOS/HCMOS compatible output 5-pin SOT23-5: 2.9mm x 2.8mm Pb-free, RoHS and REACH compliant For AEC-Q100 one- output clock generators, refer to SiT2024 and SiT2025 Electrical Specifications 1, 2 Table 1. Electrical Characteristics Parameters Symbol Min. Typ. Max. Unit Condition Frequency Range Output Frequency Range f1 110 MHz Frequency Stability and Aging Frequency Stability F stab -20 +20 ppm Inclusive of Initial tolerance at 25C, 1st year aging at 25C, and variations over operating temperature, rated power supply -25 +25 ppm voltage and load (15 pF 10%). -50 +50 ppm Operating Temperature Range Operating Temperature Range T use -20 +70 C Extended Commercial (ambient) -40 +85 C Industrial Supply Voltage and Current Consumption Supply Voltage Vdd 1.62 1.8 1.98 V 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.7 3.0 3.3 V 2.97 3.3 3.63 V 2.25 3.63 V Current Consumption Idd 3.8 4.5 mA No load condition, f = 20 MHz, Vdd = 2.8V, 3.0V or 3.3V 3.6 4.2 mA No load condition, f = 20 MHz, Vdd = 2.5V 3.4 3.9 mA No load condition, f = 20 MHz, Vdd = 1.8V OE Disable Current I od 4.3 mA Vdd = 2.5V to 3.3V, OE = Low, output in high Z state. 4.1 mA Vdd = 1.8V, OE = Low, output in high Z state. Standby Current I std 2.6 4.3 A Vdd = 2.8V to 3.3V, ST = Low, Output is Weakly Pulled Down 1.4 2.5 A Vdd = 2.5V, ST = Low, Output is Weakly Pulled Down 0.6 1.3 A Vdd = 1.8V, ST = Low, Output is Weakly Pulled Down LVCMOS Output Characteristics Duty Cycle DC 45 55 % All Vdds Rise/Fall Time Tr, Tf 1.0 2.0 ns Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80% 1.3 2.5 ns Vdd =1.8V, 20% - 80% 1.0 2.0 ns Vdd = 2.25V - 3.63V, 20% - 80% Output High Voltage VOH 90% Vdd IOH = -4 mA (Vdd = 3.0V or 3.3V) IOH = -3 mA (Vdd = 2.8V or 2.5V) IOH = -2 mA (Vdd = 1.8V) Output Low Voltage VOL 10% Vdd IOL = 4 mA (Vdd = 3.0V or 3.3V) IOL = 3 mA (Vdd = 2.8V or 2.5V) IOL = 2 mA (Vdd = 1.8V) SiTime Corporation 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Rev. 1.0 Revised October 16, 2014SiT9201 Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice 1, 2 Table 1. Electrical Characteristics (continued) Parameters Symbol Min. Typ. Max. Unit Condition Input Characteristics Input High Voltage VIH 70% Vdd Pin 3, OE or ST Input Low Voltage VIL 30% Vdd Pin 3, OE or ST Input Pull-up Impedence Z in 50 87 150 k Pin 3, OE logic high or logic low, or ST logic high 2 M Pin 3, ST logic low Startup and Resume Timing Startup Time T start 5 ms Measured from the time Vdd reaches 90% of final value Enable/Disable Time T oe 130 ns f = 110 MHz. For other frequencies, T oe = 100 ns + 3 * clock periods Resume Time T resume 5 ms Measured from the time ST pin crosses 50% threshold Jitter RMS Period Jitter T jitt 1.76 3 ps f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V 1.78 3 ps f = 75 MHz, Vdd = 1.8V Peak-to-peak Period Jitter T pk 12 20 ps f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V 14 25 ps f = 75 MHz, Vdd = 1.8V RMS Phase Jitter (random) T phj 0.5 0.9 ps f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz 1.3 2 ps f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz Notes: 1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated. 2. The typical value of any parameter in the Electrical Characteristics table is specified for the nominal value of the highest voltage option for that parameter and at 25C temperature. Table 2. Pin Description Top View Pin Symbol Functionality 3 1 GND Power Electrical ground OE/ST/NC NC GND 2 NC No Connect No connect 4 1 Output H : specified frequency output 3 2 Enable L: output is high impedance. Only output driver is disabled. 4 H or Open : specified frequency output 3OE/ ST/NC Standby L: output is low (weak pull down). Device goes to sleep mode. Supply current reduces to I std. 4 Any voltage between 0 and Vdd or Open : Specified frequency No Connect output. Pin 3 has no function. 3 4 VDD Power Power supply voltage 4 5 5 OUT Output Oscillator output VDD OUT Notes: 3. A capacitor of value 0.1 F or higher between Vdd and GND is required. Figure 1. Pin Assignments 4. In OE or ST mode, a pull-up resistor of 10 k or less is recommended if pin 3 is not externally driven. If pin 3 needs to be left floating, use the NC option. Rev. 1.0 Page 2 of 12 www.sitime.com