LCD-14532

SOLOMON SYSTECH SEMICONDUCTOR TECHNICAL DATA SSD1306 Advance Information 128 x 64 Dot Matrix OLED/PLED Segment/Common Driver with Controller This document contains information on a new product. Specifications and information herein are subject to change without notice. CONTENTS 1 GENERAL DESCRIPTION .......................................................................................................6 2 FEATURES...................................................................................................................................6 3 ORDERING INFORMATION ...................................................................................................6 4 BLOCK DIAGRAM ....................................................................................................................7 5 DIE PAD FLOOR PLAN ............................................................................................................8 6 PIN ARRANGEMENT..............................................................................................................11 6.1 SSD1306TR1 PIN ASSIGNMENT.......................................................................................................................... 11 7 PIN DESCRIPTION ..................................................................................................................13 8 FUNCTIONAL BLOCK DESCRIPTIONS.............................................................................15 8.1 MCU INTERFACE SELECTION.............................................................................................................................. 15 8.1.1 MCU Parallel 6800-series Interface.......................................................................................................... 15 8.1.2 MCU Parallel 8080-series Interface.......................................................................................................... 16 8.1.3 MCU Serial Interface (4-wire SPI)............................................................................................................ 17 8.1.4 MCU Serial Interface (3-wire SPI)............................................................................................................ 18 2 8.1.5 MCU I C Interface..................................................................................................................................... 19 8.2 COMMAND DECODER ......................................................................................................................................... 22 8.3 OSCILLATOR CIRCUIT AND DISPLAY TIME GENERATOR..................................................................................... 22 8.4 FR SYNCHRONIZATION ....................................................................................................................................... 23 8.5 RESET CIRCUIT................................................................................................................................................... 23 8.6 SEGMENT DRIVERS / COMMON DRIVERS ............................................................................................................ 24 8.7 GRAPHIC DISPLAY DATA RAM (GDDRAM)..................................................................................................... 25 8.8 SEG/COM DRIVING BLOCK ............................................................................................................................... 26 8.9 POWER ON AND OFF SEQUENCE ........................................................................................................................ 27 9 COMMAND TABLE .................................................................................................................28 9.1 DATA READ / WRITE .......................................................................................................................................... 33 10 COMMAND DESCRIPTIONS .............................................................................................34 10.1 FUNDAMENTAL COMMAND ................................................................................................................................ 34 10.1.1 Set Lower Column Start Address for Page Addressing Mode (00h~0Fh) ................................................. 34 10.1.2 Set Higher Column Start Address for Page Addressing Mode (10h~1Fh) ................................................ 34 10.1.3 Set Memory Addressing Mode (20h).......................................................................................................... 34 10.1.4 Set Column Address (21h) ......................................................................................................................... 35 10.1.5 Set Page Address (22h).............................................................................................................................. 36 10.1.6 Set Display Start Line (40h~7Fh) .............................................................................................................. 36 10.1.7 Set Contrast Control for BANK0 (81h)...................................................................................................... 36 10.1.8 Set Segment Re-map (A0h/A1h) ................................................................................................................. 36 10.1.9 Entire Display ON (A4h/A5h) .................................................................................................................. 37 10.1.10 Set Normal/Inverse Display (A6h/A7h).................................................................................................. 37 10.1.11 Set Multiplex Ratio (A8h)....................................................................................................................... 37 10.1.12 Set Display ON/OFF (AEh/AFh) ........................................................................................................... 37 10.1.13 Set Page Start Address for Page Addressing Mode (B0h~B7h)............................................................. 37 10.1.14 Set COM Output Scan Direction (C0h/C8h).......................................................................................... 37 10.1.15 Set Display Offset (D3h) ........................................................................................................................ 37 10.1.16 Set Display Clock Divide Ratio/ Oscillator Frequency (D5h) ............................................................... 40 10.1.17 Set Pre-charge Period (D9h) ................................................................................................................. 40 10.1.18 Set COM Pins Hardware Configuration (DAh)..................................................................................... 40 10.1.19 Set V Deselect Level (DBh) ........................................................................................................... 43 COMH Solomon Systech Apr 2008 P 2/59 Rev 1.1 SSD1306