74LCX139MTR STMicroelectronics

74LCX139 Low voltage CMOS Dual 2 to 4 decoder / demultiplexer Features 5V tolerant inputs High speed: t = 6.2ns (Max) at V = 3V PD CC Power down protection on inputs and outputs Symmetrical output impedance: SO-16 TSSOP16 I = I = 24mA (Min) at V = 3V OH OL CC PCI bus levels guaranteed at 24mA Description Balanced propagation delays: t t The 74LCX139 is a low voltage CMOS dual 2 to 4 PLH PHL line Decoder / Demultiplexer fabricated with sub- Operating voltage range: micron silicon gate and double-layer metal wiring V (Opr) = 2.0V to 3.6V 2 CC C MOS technology. Pin and function compatible with It is ideal for low power and high speed 3.3V 74 series 139 applications it can be interfaced to 5V signal Latch-up performance exceeds environment for inputs. 500mA (JESD 17) The active low enable input can be used for gating ESD performance: or as a data input for demultiplexing applications. HBM > 2000V While the enable input is held high, all four (MIL STD 883 method 3015) MM > 200V outputs are high independently of the other inputs. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Order codes Part number Package Packaging 74LCX139MTR SO-16 Tape and reel 74LCX139TTR TSSOP16 Tape and reel July 2006 Rev 4 1/17 www.st.com 17 Obsolete Product(s) - Obsolete Product(s)Contents 74LCX139 Contents 1 Logic symbols and I/O equivalent circuit 3 2 Pin settings 4 2.1 Pin connection 4 2.2 Pin description 4 2.3 Truth table 5 2.4 Logic diagram . 5 3 Maximum rating . 6 3.1 Recommended operating conditions . 6 4 Electrical characteristics . 7 5 Test circuit . 9 6 Waveforms 10 7 Package mechanical data 11 8 Revision history . 16 2/17 Obsolete Product(s) - Obsolete Product(s)