Product Information

74VHC74TTR

74VHC74TTR electronic component of STMicroelectronics

Datasheet
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Manufacturer: STMicroelectronics
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 1
Multiples : 1

Stock Image

74VHC74TTR
STMicroelectronics

1 : USD 1.0335
10 : USD 0.9005
25 : USD 0.796
100 : USD 0.6936
250 : USD 0.6037
500 : USD 0.5139
1000 : USD 0.4116
N/A

Obsolete
0 - WHS 2


Multiples : 1

Stock Image

74VHC74TTR
STMicroelectronics

N/A

Obsolete
0 - WHS 3


Multiples : 1

Stock Image

74VHC74TTR
STMicroelectronics

N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Family
Logic Type
Polarity
Input Type
Output Type
Propagation Delay Time
High Level Output Current
Low Level Output Current
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Series
Brand
Number Of Input Lines
Number Of Output Lines
Factory Pack Quantity :
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74VHC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR HIGH SPEED: f = 170 MHz (TYP.) at V = 5V MAX CC LOW POWER DISSIPATION: I = 2 A (MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28% V (MIN.) NIH NIL CC SOP TSSOP POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: I = I = 8 mA (MIN) Table 1: Order Codes OH OL BALANCED PROPAGATION DELAYS: PACKAGE T & R t t PLH PHL OPERATING VOLTAGE RANGE: SOP 74VHC74MTR V (OPR) = 2V to 5.5V TSSOP 74VHC74TTR CC PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74 CLR and PR are independent of the clock and IMPROVED LATCH-UP IMMUNITY accomplished by a low setting on the appropriate input. DESCRIPTION Power down protection is provided on all inputs The 74VHC74 is an advanced high-speed CMOS and 0 to 7V can be accepted on inputs with no DUAL D-TYPE FLIP FLOP WITH PRESET AND regard to the supply voltage. This device can be CLEAR fabricated with sub-micron silicon gate used to interface 5V to 3V. 2 and double-layer metal wiring C MOS technology. All inputs and outputs are equipped with A signal on the D INPUT is transferred to the Q protection circuits against static discharge, giving OUTPUTS during the positive going transition of them 2KV ESD immunity and transient excess the clock pulse. voltage. Figure 1: Pin Connection And IEC Logic Symbols Rev. 4 November 2004 1/14 Obsolete Product(s) - Obsolete Product(s)74VHC74 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N SYMBOL NAME AND FUNCTION Asynchronous Reset - 1, 13 1CLR, 2CLR Direct Input 2, 12 1D, 2D Data Inputs 3, 11 1CK, 2CK Clock Input (LOW to HIGH, Edge Triggered) 4, 10 1PR, 2PR Asynchronous Set - Direct Input 5, 9 1Q, 2Q True Flip-Flop Outputs 6, 8 1Q, 2Q Complement Flip-Flop Outputs 7 GND Ground (0V) 14 V Positive Supply Voltage CC Table 3: Truth Table INPUTS OUTPUTS FUNCTION CLR PR DCK Q Q LH X X L H CLEAR H L X X H L PRESET LL X X H H HH L L H HH H H L Q Q HHX NO CHANGE n n X : Dont Care Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays 2/14 Obsolete Product(s) - Obsolete Product(s)

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
C-Max
C-Max (VA)
SG3
ST
ST MICROELECTRONICS
ST2
ST7
STM
STMICRELECTRONICS
STN

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