M74HC221 DUAL MONOSTABLE MULTIVIBRATOR HIGH SPEED : t = 24 ns (TYP.) at V = 6V PD CC LOW POWER DISSIPATION: STAND BY STATE : I =4A (MAX.) at T =25C CC A ACTIVE STATE : I =700A (MAX.) at V = 5V DIP SOP TSSOP CC CC HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC SYMMETRICAL OUTPUT IMPEDANCE: ORDER CODES I = I = 4mA (MIN) OH OL PACKAGE TUBE T & R BALANCED PROPAGATION DELAYS: DIP M74HC221B1R t t PLH PHL SOP M74HC221M1R M74HC221RM13TR WIDE OPERATING VOLTAGE RANGE: TSSOP M74HC221TTR V (OPR) = 2V to 6V CC WIDE OUTPUT PULSE WIDTH RANGE : t = 150 ns ~ 60 s OVER AT V = 4.5 V WOUT CC triggering the output maintains the PIN AND FUNCTION COMPATIBLE WITH MONOSTABLE STATE for the time period 74 SERIES 221 determined by the external resistor Rx and capacitor Cx. Taking CLR low breaks this DESCRIPTION MONOSTABLE STATE. If the next trigger pulse The M74HC221 is an high speed CMOS occurs during the MONOSTABLE period it makes MONOSTABLE MULTIVIBRATOR fabricated with the MONOSTABLE period longer. 2 silicon gate C MOS technology. Limit for values of Cx and Rx : There are two trigger inputs, A INPUT (negative Cx : NO LIMIT edge) and B INPUT (positive edge). Rx : V < 3.0V 5K to 1M cc Triggering on the B input occurs at a particular V > 3.0V 1K to 1M cc voltage threshold and is not related to rise and fall K 0.7 time of the applied pulse. The device may also be All inputs are equipped with protection circuits trigger by using the CLR input (positive edge) against static discharge and transient excess because of the Schimtt-trigger input after voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/14 Obsolete Product(s) - Obsolete Product(s)M74HC221 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION Trigger Inputs (Negative 1,9 1A, 2A Edge Triggered) Trigger Inputs (Positive 2, 10 1B, 2B Edge Triggered) Direct Reset LOW and 1 CLR 3, 11 trigger Action at Positive 2 CLR Edge 4, 12 1Q, 2Q Outputs (Active Low) External Resistor 2R /C 7 X X Capacitor Connection 13, 5 1Q, 2Q Outputs (Active High) 1C External Capacitor X 14, 6 2C Connection X External Resistor 1R /C 15 X X Capacitor Connection 8 GND Ground (0V) 16 Vcc Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS NOTE A BCLR QQ H H OUTPUT ENABLE X L H L(*) H(*) INHIBIT H X H L(*) H(*) INHIBIT L H OUTPUT ENABLE L H OUTPUT ENABLE X X L L H INHIBIT X : Dont Care (*) : Except for monostable period 2/14 Obsolete Product(s) - Obsolete Product(s)