M74HC688 8 BIT EQUALITY COMPARATOR HIGH SPEED: t = 17ns (TYP.) at V = 6V PD CC LOW POWER DISSIPATION: I = 4A(MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC DIP SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: I = I = 4mA (MIN) OH OL BALANCED PROPAGATION DELAYS: t t ORDER CODES PLH PHL WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T & R V (OPR) = 2V to 6V CC DIP M74HC688B1R PIN AND FUNCTION COMPATIBLE WITH SOP M74HC688M1R M74HC688RM13TR 74 SERIES 688 TSSOP M74HC688TTR DESCRIPTION The M74HC688 is an high speed CMOS 8 BIT single active low enable is provided to facilitate EQUALITY COMPARATOR fabricated with silicon cascading several packages to enable 2 gate C MOS technology. comparison of words greater than 8 bits. The M74HC688 compares bit for bit two 8-bit All inputs are equipped with protection circuits words applied on inputs P0 - P7 and inputs Q0 - against static discharge and transient excess Q7 and indicates whether or not they are equal. A voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/9 Obsolete Product(s) - Obsolete Product(s)M74HC688 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1G Enable Input (Active LOW) 2, 4, 6, 8, 11, P0 to P7 Word Inputs 13, 15, 17 3, 5, 7, 9, 12, Q0 to Q7 Word Outputs 14, 16, 18 19 P = Q Equal to Output 10 GND Ground (0V) 20 V Positive Supply Voltage CC TRUTH TABLE INPUTS OUTPUT P, Q G P = Q P = Q L L P <> Q L H XH H X: Dont Care LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/9 Obsolete Product(s) - Obsolete Product(s)