ST25R3916 ST25R3917 High performance NFC universal device and EMVCo reader Datasheet - production data Automatic gain control and squelch feature to maximize SNR Low power capacitive and inductive card detection Low power NFC active and passive target modes Adjustable ASK modulation depth, from 5 VFQFPN32 (5x5 mm) WLCSP36 to 40% Integrated regulators to boost system PSRR Features AM/PM and I/Q demodulator with baseband channel summation or automatic Operating modes channel selection Reader/writer Possibility to drive two independent single Card emulation ended antennas Active and passive peer to peer Measurement of antenna voltage amplitude RF communication and phase, RSSI, on-chip supply and regulated voltages EMVCo 3.0 analog and digital compliant NFC-A / ISO14443A up to 848 kbit/s External communication interfaces NFC-B / ISO14443B up to 848 kbit/s 512-byte FIFO NFC-F / FeliCa up to 424 kbit/s Serial peripheral interface (SPI) up to 10 Mbit/s NFC-V / ISO15693 up to 53 kb/s I2C with up to 400 kbit/s in Fast-mode, NFC-A / ISO14443A and NFC-F / FeliCa 1 Mbit/s in Fast-mode Plus, and 3.4 Mbit/s card emulation in High-speed mode Active and passive peer to peer initiator and target modes, up to 424 kbit/s Electrical characteristics Low level modes to implement MIFARE Wide supply voltage and ambient Classic compliant or other custom temperature range (2.6 to 5.5 V from -40 C protocols to +105 C, 2.4 to 5.5 V from -20 C to +105 C) Key features Wide peripheral communication supply Dynamic power output (DPO) controls the range, from 1.65 to 5.5 V field strength to stay within given limits Quartz oscillator capable of operating with Active wave shaping (AWS) reduces over- 27.12 MHz crystal with fast start-up and under-shoots Noise suppression receiver (NSR) allows reception in noisy environment Automatic antenna tuning (AAT) via variable capacitor Integrated EMVCo 3.0 compliant EMD handling August 2021 DS12484 Rev 4 1/157 This is information on a product in full production. www.st.comContents ST25R3916/7 Contents 1 Applications . 11 2 Description 12 2.1 System diagram 13 2.2 Block diagram 15 2.2.1 Transmitter . 15 2.2.2 Receiver . 16 2.2.3 Phase and amplitude detector 16 2.2.4 Automatic antenna tuning (AAT) 16 2.2.5 A/D converter . 16 2.2.6 Capacitive sensor . 16 2.2.7 External field detector 17 2.2.8 Quartz crystal oscillator . 17 2.2.9 Power supply regulators 17 2.2.10 POR and bias 17 2.2.11 RC oscillator and Wake-up timer 17 2.2.12 TX encoding 18 2.2.13 RX decoding . 18 2.2.14 FIFO 18 2.2.15 Control logic 18 2.2.16 Host interface . 18 2.2.17 Passive target memory . 18 2.2.18 P2RAM . 18 3 Pin and signal description . 19 4 Application information . 23 4.1 Power-on sequence . 23 4.2 Operating modes . 23 4.2.1 Transmitter . 23 4.2.2 Receiver . 26 4.2.3 Antenna tuning 31 4.2.4 Capacitive sensor . 31 4.2.5 Wake-up mode 33 2/157 DS12484 Rev 4