TSM80N950 Taiwan Semiconductor N-Channel Power MOSFET 800V, 6A, 0.95 FEATURES KEY PERFORMANCE PARAMETERS Super-Junction technology PARAMETER VALUE UNIT High performance due to small figure-of-merit V 800 V DS High ruggedness performance R (max) 0.95 DS(on) High commutation performance Q 19.6 nC g Pb-free plating Compliant to RoHS Directive 2011/65/EU and in accordance to WEE 2002/96/EC Halogen-free according to IEC 61249-2-21 definition APPLICATION Power Supply Lighting TO-251 (IPAK) TO-252 (DPAK) Notes: MSL 3 (Moisture Sensitivity Level) for TO-252 (D-PAK) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V 800 V DS Gate-Source Voltage V 30 V GS T = 25C 6 A C (Note 1) Continuous Drain Current I D T = 100C 3.8 A C (Note 2) Pulsed Drain Current I 18 A DM Total Power Dissipation T = 25C P 110 W C DTOT (Note 3) Single Pulsed Avalanche Energy E 121 mJ AS (Note 3) Single Pulsed Avalanche Current I 2.2 A AS Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG Document Number:DS P0000217 1 Version: B1706 TSM80N950 Taiwan Semiconductor THERMAL PERFORMANCE PARAMETER SYMBOL LIMIT UNIT Junction to Case Thermal Resistance R 1.14 C/W JC Junction to Ambient Thermal Resistance R 62 C/W JA Notes: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined JA at the solder mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board JA CA design. R shown below for single device operation on FR-4 PCB with minimum recommended footprint in still air. JA ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 4) Static Drain-Source Breakdown Voltage V = 0V, I = 250A BV 800 -- -- V GS D DSS Gate Threshold Voltage V = V , I = 250A V 2 -- 4 DS GS D GS(TH) V Gate Body Leakage V = 30V, V = 0V I -- -- 100 nA GS DS GSS Zero Gate Voltage Drain Current V = 800V, V = 0V I -- -- 1 DS GS DSS A V = 10V, I = 3A -- 0.8 0.95 Drain-Source On-State Resistance R GS D DS(on) (Note 5) Dynamic Total Gate Charge Q -- 19.6 -- g V = 380V, I = 6A, DS D Gate-Source Charge Q -- 3.5 -- gs nC V = 10V GS Gate-Drain Charge Q -- 9.7 -- gd Input Capacitance C -- 691 -- iss V = 100V, V = 0V, DS GS pF Output Capacitance f = 1.0MHz C -- 63 -- oss Gate Resistance F = 1MHz, open drain R -- 3.4 -- g (Note 6) Switching Turn-On Delay Time t -- 23 -- d(on) V = 380V, DD Turn-On Rise Time t -- 12 -- r R = 25, ns GEN Turn-Off Delay Time t -- 57 -- d(off) I = 6A, V = 10V, D GS Turn-Off Fall Time t -- 11 -- f (Note 4) Source-Drain Diode Forward On Voltage -- -- 1.4 V I = 6A, V = 0V V S GS SD Reverse Recovery Time -- 249 -- ns t rr V = 100V, I = 6A R S Reverse Recovery Charge -- 2.6 -- C dI /dt = 100A/s Q F rr Notes: 1. Current limited by package. 2. Pulse width limited by the maximum junction temperature. o 3. L = 50mH, I = 2.2A, V = 50V, R = 25, Starting T = 25 C AS DD G J 4. Pulse test: PW 300s, duty cycle 2%. 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. Document Number:DS P0000217 2 Version: B1706