New Product Si7454DDP Vishay Siliconix N-Channel 100 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Power MOSFET a V (V) R () Max. Q (Typ.) I (A) 100 % R and UIS Tested DS DS(on) g D g Material categorization: For definitions of compliance 0.033 at V = 10 V 21 GS please see www.vishay.com/doc 99912 0.036 at V = 7.5 V 100 20 6.1 nC GS APPLICATIONS 0.047 at V = 4.5 V 17.7 GS DC/DC Primary Side Switch Telecom/Server 48 V, Full/Half-Bridge DC/DC PowerPAK SO-8 Industrial Synchronous Rectification S 6.15 mm 5.15 mm D 1 S 2 S 3 G 4 D 8 D 7 D G 6 D 5 Bottom View Ordering Information: S Si7454DDP-T1-GE3 (Lead (Pb)-free and Halogen-free) N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit V Drain-Source Voltage 100 DS V V Gate-Source Voltage 20 GS T = 25 C 21 C T = 70 C 17 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 7.9 b, c T = 70 C A 6.3 A I Pulsed Drain Current (t = 300 s) 40 DM T = 25 C 22 C I Continuous Source-Drain Diode Current S b, c T = 25 C A 3.7 I Single Pulse Avalanche Current 12 AS L = 0.1 mH Single Pulse Avalanche Energy E 7.2 mJ AS T = 25 C 29.7 C T = 70 C 19 C Maximum Power Dissipation P W D b, c T = 25 C A 4.1 b, c T = 70 C 2.6 A T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e 260 Soldering Recommendations (Peak Temperature) THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 10 s R 24 30 Maximum Junction-to-Ambient thJA C/W Steady State R Maximum Junction-to-Case (Drain) 3.3 4.2 thJC Notes: a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 70 C/W. Document Number: 67883 www.vishay.com For technical questions, contact: pmostechsupport vishay.com S12-1358-Rev. A, 11-Jun-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000New Product Si7454DDP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static V V = 0 V, I = 250 A Drain-Source Breakdown Voltage 100 V DS GS D V Temperature Coefficient V /T 60 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 5 GS(th) GS(th) J Gate-Source Threshold Voltage V V = V , I = 250 A 1.5 3.0 V GS(th) DS GS D I V = 0 V, V = 20 V Gate-Source Leakage 100 nA GSS DS GS V = 100 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 100 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 20 A On-State Drain Current D(on) DS GS V = 10 V, I = 10 A 0.027 0.033 GS D a R V = 7.5 V, I = 8 A 0.029 0.036 Drain-Source On-State Resistance DS(on) GS D V = 4.5 V, I = 6 A 0.036 0.047 GS D a g V = 10 V, I = 10 A 19 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 550 iss C V = 50 V, V = 0 V, f = 1 MHz Output Capacitance 217 pF oss DS GS C Reverse Transfer Capacitance 26 rss V = 50 V, V = 10 V, I = 10 A 12.8 19.5 DS GS D Total Gate Charge Q V = 50 V, V = 7.5 V, I = 10 A g 9.7 15 DS GS D 6.1 9.5 nC Gate-Source Charge Q V = 50 V, V = 4.5 V, I = 10 A 1.8 gs DS GS D Q Gate-Drain Charge 2.9 gd Output Charge Q V = 50 V, V = 0 V 17.2 26 oss DS GS R Gate Resistance f = 1 MHz 0.2 1 2 g Turn-On Delay Time t 10 20 d(on) t Rise Time V = 50 V, R = 5 13 26 r DD L I 10 A, V = 10 V, R = 1 Turn-Off Delay Time t 16 32 d(off) D GEN g t Fall Time 918 f ns t Turn-On Delay Time 10 20 d(on) t Rise Time V = 50 V, R = 5 12 24 r DD L I 10 A, V = 7.5 V, R = 1 t Turn-Off Delay Time D GEN g 16 32 d(off) t Fall Time 918 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current 22 S C A a I 40 Pulse Diode Forward Current SM V I = 4 A Body Diode Voltage 0.8 1.2 V SD S t Body Diode Reverse Recovery Time 30 60 ns rr Q Body Diode Reverse Recovery Charge 28 56 nC rr I = 5 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 19 a ns t Reverse Recovery Rise Time 11 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 67883 For technical questions, contact: pmostechsupport vishay.com 2 S12-1358-Rev. A, 11-Jun-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000