Product Information

TSCS25A3X1NDGXZAX

TSCS25A3X1NDGXZAX electronic component of Tempo Semiconductor

Datasheet
Interface - CODECs I2S/PCM, Analog In/ Headphone, DSP

Manufacturer: Tempo Semiconductor
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Price (USD)

1: USD 8.6838 ea
Line Total: USD 8.68

1335 - Global Stock
Ships to you between
Wed. 22 May to Fri. 24 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1029 - WHS 1


Ships to you between Wed. 22 May to Fri. 24 May

MOQ : 1
Multiples : 1

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TSCS25A3X1NDGXZAX
Tempo Semiconductor

1 : USD 5.0025
10 : USD 4.554
100 : USD 2.99
490 : USD 2.7255
5390 : USD 2.714

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Type
Resolution
Conversion Rate
Interface Type
Number of ADCs
Number of DACs
Operating Supply Voltage
Maximum Operating Temperature
Minimum Operating Temperature
Package / Case
Packaging
Product
Mounting Style
Features
Series
Brand
Thd Plus Noise
Operating Supply Current
Product Type
Snr - Signal To Noise Ratio
Factory Pack Quantity :
Subcategory
Supply Voltage - Max
Supply Voltage - Min
Cnhts
Hts Code
Mxhts
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DATASHEET Tempo Semiconductor, Inc. PORTABLE CONSUMER CODEC TSCS25xx LOW-POWER, HIGH-FIDELITY INTEGRATED CODEC DESCRIPTION FEATURES The TSCS25xx is a low-power, high-fidelity integrated CODEC On-chip true cap-less headphone driver with 32 bit stereo playback stereo record functionality. In addition 35 mW output power (16 ) to a high-fidelity low-power CODEC, the device integrates stereo 29 mW output power (32 ) true cap-less headphone amplifiers. Charge-pump allows true, ground-centered outputs SNR (A-Weighted, no active signal) -124dB The digital audio data ports (both input and output) work in both Headphone detection logic master or slave mode and supports all common formats including I2S, Left-Justified, Right-Justified and TDM as well as direct High fidelity CODEC Bluetooth PCM mode. 32 bit stereo DAC and 32-bit stereo ADC Sample rates from 8k to 96 kHz Beyond high-fidelity for portable systems, the device offers an enriched audio presence through built-in audio output Audio Output Processing DSP Engine processing (AOP) DSP engine. The AOP supports 12 Bands of 3D stereo enhancement EQ, Psychoacoustic Bass and Treble enhancement, 3D stereo 12 band parametric equalizers enhancement and Dynamic Range controller to support pro-style Dynamic Range controller Multi-band Compressor/Limiter capability. - Multi-band with independent attack/release and gain - Limiter - Expander Psychoacoustic Bass and Treble enhancement APPLICATIONS processing Multimedia Handsets Microphone/line-in interface Analog microphone or line-in inputs Lightning and USB-C connected Headphones Automatic level control Low power with built in power management 1.7 V CODEC supports 1Vrms Very low standby and no-signal power consumption 1.8V digital / 1.7V analog supply for low power 3// *3,2 , & 2 ,QWHUQDO 2-wire (I C compatible) control interface XGLR &ORFNV 0&/. 2 I S data interface , 6 3&0 287 /,1 Supports Bluetooth PCM mode & 08 /,1 Left-Justified, Right-Justified, and PCM Audio Interfaces ,1387 352&(6625 Package / & 3 /(66 +3 5,1 & / /,1(287 & 08 40-pin, 5x5mm, QFN 5,1 63 08 6 5 & 3 /(66 +3 95() 0,&%, 6 & 5 /,1(287 , 6 3&0 /,1 08 /,1 6 6 B /,1 &+ 5*( 08 (7(&7 +3 3803 5,1 Z 1 V1.1 4/19/2017 2017 TEMPO SEMICONDCUTOR, INC. TSCS25XXTSCS25xx Portable Consumer CODECs 1. OVERVIEW ................................................................................................................................6 1.1. Block Diagram ...................................................................................................................................6 1.2. Audio Outputs ....................................................................................................................................6 1.3. Audio Inputs .......................................................................................................................................7 2. POWER MANAGEMENT ...........................................................................................................8 2.1. Control Registers ...............................................................................................................................8 2.1.1. Power Management Register 1 ...........................................................................................8 2.1.2. Power Management 2 Register ..........................................................................................9 2.2. Stopping the Master Clock .................................................................................................................9 3. OUTPUT AUDIO PROCESSING ..............................................................................................10 3.1. DC Removal ....................................................................................................................................10 3.2. Volume Control ................................................................................................................................11 3.2.1. Volume Control Registers ..................................................................................................12 3.3. Parametric Equalizer .......................................................................................................................13 3.3.1. Prescaler & Equalizer Filter ...............................................................................................13 3.3.2. EQ Filter Enable Register .................................................................................................14 3.3.3. DACCRAM Write/Read Registers ......................................................................................14 3.3.3.1. DAC Coefficient Write Data Low Register ......................................................14 3.3.3.2. DAC Coefficient Write Data Mid Register ........................................................14 3.3.3.3. DAC Coefficient WRITE Data High Register ....................................................15 3.3.3.4. DAC Coefficient Read Data Low Register ........................................................15 3.3.3.5. DAC Coefficient Read Data Mid Register .........................................................15 3.3.3.6. DAC Coefficient Read Data High Register .......................................................15 3.3.4. DACCRAM Address Register ............................................................................................16 3.3.5. DACCRAM STATUS Register ...........................................................................................16 3.3.6. Equalizer, Bass, Treble Coefficient & Equalizer Prescaler RAM .......................................16 3.4. Gain and Dynamic Range Control ...................................................................................................21 3.5. Multi-band Compressor ...................................................................................................................21 3.5.1. Overview ............................................................................................................................21 3.5.2. Multi band Compressor Registers ......................................................................................23 3.6. Limiter/Compressor/Expander .........................................................................................................30 3.6.1. Overview ............................................................................................................................30 3.6.2. Configuration ......................................................................................................................31 3.6.3. Controlling parameters .......................................................................................................32 3.6.4. Limiter/Compressor/Expander Registers ...........................................................................32 3.6.4.1. General compressor/limiter/expander control Register ....................................32 3.6.4.2. Compressor/Limiter/Expander make-up gain Register ....................................33 3.6.4.3. Compressor Threshold Register .......................................................................33 3.6.4.4. Compressor ration register ...............................................................................33 3.6.4.5. Compressor Attack Time Constant Register (Low) ..........................................33 3.6.4.6. Compressor Attack Time Constant Register (High) .........................................34 3.6.4.7. Compressor Release Time Constant Register (Low) .......................................34 3.6.4.8. Compressor Release Time Constant Register (High) ......................................34 3.6.4.9. Limiter Threshold Register ...............................................................................34 3.6.4.10. Limiter Target Register ...................................................................................35 3.6.4.11. Limiter Attack Time Constant Register (Low) .................................................35 3.6.4.12. Limiter Attack Time Constant Register (High) ................................................35 3.6.4.13. Limiter Release Time Constant Register (Low) ..............................................35 3.6.4.14. Limiter Release Time Constant Register (High) .............................................36 3.6.4.15. Expander Threshold Register .........................................................................36 3.6.4.16. Expander Ratio Register ................................................................................36 3.6.4.17. Expander Attack Time Constant Register (Low) ............................................36 3.6.4.18. Expander Attack Time Constant Register (High) ............................................37 3.6.4.19. Expander Release Time Constant Register (Low) .........................................37 3.6.4.20. Expander Release Time Constant Register (High) ........................................37 3.7. Output Effects ..................................................................................................................................37 3.7.1. FX Control Register ...........................................................................................................38 3.7.2. Stereo Depth (3-D) Enhancement .....................................................................................38 3.7.3. Psychoacoustic Bass Enhancement ..................................................................................39 2 V1.1 4/19/2017 2017 TEMPO SEMICONDCUTOR, INC. TSCS25XX

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

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