SN74LVC1G04 www.ti.com SCES214ABAPRIL 1999REVISED OCTOBER 2013 SINGLE INVERTER GATE Check for Samples: SN74LVC1G04 1FEATURES DESCRIPTION This single inverter gate is designed for 2 Available in the Texas Instruments NanoFree 1.65-V to 5.5-V V operation. CC Package The SN74LVC1G04 performs the Boolean function Supports 5-V V Operation CC Y = A. Inputs Accept Voltages up to 5.5V Allowing Down Translation to V NanoFree package technology is a major CC breakthrough in IC packaging concepts, using the die Max t of 3.3 ns at 3.3 V pd as the package. Low Power Consumption, 10- A Max I CC This device is fully specified for partial-power-down 24-mA Output Drive at 3.3-V applications using I . The I circuitry disables the off off I Supports Live Insertion, Partial Power off outputs, preventing damaging current backflow Down Mode, and Back Drive Protection through the device when it is powered down. Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) DBV PACKAGE DCK PACKAGE DRL PACKAGE DRY PACKAGE DSF PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) (TOP VIEW) (TOP VIEW) V NC 1 6 1 6 CC NC 1 5 V NC V NC 1 5 V CC CC CC 1 NC 5 V CC 2 5 A NC 5 2 2 A A NC 2 3 4 A GND Y GND 3 4 Y 3 4 Y GND 2 A 3 4 GND Y 3 4 GND Y NC No internal connection See mechanical drawings for dimensions. YZP PACKAGE YZP Package Terminal Assignments (TOP VIEW) 1 2 A1 A2 DNU V A DNU V CC CC B1 B2 B A No ball A C GND Y C1 C2 GND Y DNU Do not use YZV PACKAGE YZV Package Terminal Assignments (TOP VIEW) 1 2 A A1 A2 V A A V CC CC B1 B2 B GND Y GND Y 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 19992013, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.SN74LVC1G04 SCES214ABAPRIL 1999REVISED OCTOBER 2013 www.ti.com Function Table INPUT OUTPUT A Y H L L H Logic Diagram (Positive Logic) (DBV, DCK, DRL, DRY, DSF, and YZP Package) 2 4 A Y Logic Diagram (Positive Logic) (YZV Package) 1 3 A Y (1) Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT V Supply voltage range 0.5 6.5 V CC V Input voltage range 0.5 6.5 V I (2) V Voltage range applied to any output in the high-impedance or power-off state 0.5 6.5 V O (2) (3) V Voltage range applied to any output in the high or low state 0.5 V + 0.5 V O CC I Input clamp current V < 0 50 mA IK I I Output clamp current V < 0 50 mA OK O I Continuous output current 50 mA O Continuous current through V or GND 100 mA CC DBV package 206 DCK package 252 DRL package 142 (4) Package thermal impedance DRY package 234 C/W JA YZP package 132 YZV package 116 DSF package 300 T Storage temperature range 65 150 C stg (1) Stresses beyond those listed underabsolute maximum rating may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated underrecommended operating condition is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of V is provided in the recommended operating conditions table. CC (4) The package thermal impedance is calculated in accordance with JESD 51-7. 2 Submit Documentation Feedback Copyright 19992013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G04