TC74HC375AF(F) Toshiba

TC74HC375AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC375AP,TC74HC375AF,TC74HC375AFN 4-Bit D Type Latch Note: xxxFN (JEDEC SOP) is not available in Japan. The TC74HC375A is a high speed CMOS D-TYPE LATCH 2 TC74HC375AP fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It contains two groups of 2-bit latches controlled by an enable input (G12 or G34) and each group can be used in different circuits. Data applied to the data inputs are transferred to the Q and Q outputs whin the enable inputs is high. When the enable input is low, the outputs are not affected. All inputs are equipped with protection circuits against static TC74HC375AF discharge or transient excess voltage. Features High speed: t = 14 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 4 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Output drive capability: 10 LSTTL loads Symmetrical output impedance: I = I = 4 mA (min) OH OL TC74HC375AFN Balanced propagation delays: t t pLH pHL Wide operating voltage range: V (opr) = 2 to 6 V CC Pin and function compatible with 74LS375 Pin Assignment Weight DIP16-P-300-2.54A : 1.00 g (typ.) SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.13 g (typ.) 1 2007-10-01 TC74HC375AP/AF/AFN IEC Logic Symbol Truth Table Inputs Outputs Function D G Q Q L H L H H H H L X L Qn Qn Latch X: Dont care System Diagram 2 2007-10-01