TC74HC573AF Toshiba

TC74HC573AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC573AP, TC74HC573AF Octal D-Type Latch with 3-State Output The TC74HC573A is a high speed CMOS OCTAL LATCH with 2 TC74HC573AP 3-STATE OUTPUT fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Its 8-bit D-type latche is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74HC573AF Features High speed: t = 13 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 4 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Output drive capability: 15 LSTTL loads Symmetrical output impedance: I = I = 6 mA (min) OH OL Balanced propagation delays: t t pLH pHL Weight Wide operating voltage range: V (opr) = 2 to 6 V CC DIP20-P-300-2.54A : 1.30 g (typ.) SOP20-P-300-1.27A : 0.22 g (typ.) Pin and function compatible with 74LS573 Pin Assignment Start of commercial production 1987-11 1 2014-03-01 TC74HC573AP/AF IEC Logic Symbol Truth Table Inputs Output OE LE D Q H X X HZ L L X Qn L H L L L H H H X: Dont care HZ: High impedance Qn: Q outputs are latched at the time when the LE input is taken to a low logic level. System Diagram 2 2014-03-01